Support for arbitrary arity for step circuit's IO (#107)

* support for arbitrary arity for F

* revive MinRoot example

* revive tests

* revive ecdsa

* remove unused code

* use None instead of Some(1u32)

* revive benches

* fix clippy warning

src/traits/circuit.rs

@@ -5,16 +5,22 @@ use ff::PrimeField;
 
 /// A helper trait for a step of the incremental computation (i.e., circuit for F)
 pub trait StepCircuit<F: PrimeField>: Send + Sync + Clone {
+  /// Return the the number of inputs or outputs of each step
+  /// (this method is called only at circuit synthesis time)
+  /// `synthesize` and `output` methods are expected to take as
+  /// input a vector of size equal to arity and output a vector of size equal to arity  
+  fn arity(&self) -> usize;
+
   /// Sythesize the circuit for a computation step and return variable
   /// that corresponds to the output of the step z_{i+1}
   fn synthesize<CS: ConstraintSystem<F>>(
     &self,
     cs: &mut CS,
-    z: AllocatedNum<F>,
-  ) -> Result<AllocatedNum<F>, SynthesisError>;
+    z: &[AllocatedNum<F>],
+  ) -> Result<Vec<AllocatedNum<F>>, SynthesisError>;
 
   /// return the output of the step when provided with with the step's input
-  fn output(&self, z: &F) -> F;
+  fn output(&self, z: &[F]) -> Vec<F>;
 }
 
 /// A trivial step circuit that simply returns the input
@@ -27,15 +33,19 @@ impl<F> StepCircuit<F> for TrivialTestCircuit<F>
 where
   F: PrimeField,
 {
+  fn arity(&self) -> usize {
+    1
+  }
+
   fn synthesize<CS: ConstraintSystem<F>>(
     &self,
     _cs: &mut CS,
-    z: AllocatedNum<F>,
-  ) -> Result<AllocatedNum<F>, SynthesisError> {
-    Ok(z)
+    z: &[AllocatedNum<F>],
+  ) -> Result<Vec<AllocatedNum<F>>, SynthesisError> {
+    Ok(z.to_vec())
   }
 
-  fn output(&self, z: &F) -> F {
-    *z
+  fn output(&self, z: &[F]) -> Vec<F> {
+    z.to_vec()
   }
 }