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All Bit and logical operators working

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This commit is contained in:
Jordi Baylina
2019-12-08 13:39:16 +01:00
parent eaf4396cb3
commit 1f94f7f3ec
12 changed files with 410 additions and 110 deletions
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12
test/circuits/ops3.circom Normal file
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template Ops3() {
signal input in[2];
signal output neg1;
signal output neg2;
signal output pow;
neg1 <-- -in[0];
neg2 <-- -in[1];
pow <-- in[0] ** in[1];
}
component main = Ops3();

18
test/circuits/opsbit.circom Normal file
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template OpsBit() {
signal input in[2];
signal output and;
signal output or;
signal output xor;
signal output not1;
signal output shl;
signal output shr;
and <-- in[0] & in[1];
or <-- in[0] | in[1];
xor <-- in[0] ^ in[1];
not1 <-- ~in[0];
shl <-- in[0] << in[1];
shr <-- in[0] >> in[1];
}
component main = OpsBit();

18
test/circuits/opscmp.circom Normal file
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template OpsCmp() {
signal input in[2];
signal output lt;
signal output leq;
signal output eq;
signal output neq;
signal output geq;
signal output gt;
lt <-- in[0] < in[1];
leq <-- in[0] <= in[1];
eq <-- in[0] == in[1];
neq <-- in[0] != in[1];
geq <-- in[0] >= in[1];
gt <-- in[0] > in[1];
}
component main = OpsCmp();

12
test/circuits/opslog.circom Normal file
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template OpsLog() {
signal input in[2];
signal output and;
signal output or;
signal output not1;
and <-- in[0] && in[1];
or <-- in[0] || in[1];
not1 <-- !in[0];
}
component main = OpsLog();