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for loops

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This commit is contained in:
Jordi Baylina
2019-11-28 15:10:59 +01:00
parent 66291a0efe
commit 93330f065b
24 changed files with 1385 additions and 81 deletions
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9
test/circuits/add.circom Normal file
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@@ -0,0 +1,9 @@
template Add() {
signal input in[2];
signal output out;
out <== in[0] + in[1];
}
component main = Add();