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75 lines
1.9 KiB
75 lines
1.9 KiB
/******
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SMTProcessorLevel
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This circuit has 2 hash
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Outputs according to the state.
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State oldRoot newRoot
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===== ======= =======
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top H'(oldChild, sibling) H'(newChild, sibling)
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old0 0 new1leaf
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bot old1leaf H'(newChild, 0)
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new1 old1leaf H'(new1leaf, old1leaf)
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na 0 0
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upd old1leaf new1leaf
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H' is the Hash function with the inputs shifted acordingly.
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*****/
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template SMTProcessorLevel() {
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signal input st_top;
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signal input st_old0;
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signal input st_bot;
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signal input st_new1;
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signal input st_na;
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signal input st_upd;
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signal output oldRoot;
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signal output newRoot;
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signal input sibling;
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signal input old1leaf;
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signal input new1leaf;
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signal input newlrbit;
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signal input oldChild;
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signal input newChild;
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signal aux[4];
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component oldProofHash = SMTHash2();
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component newProofHash = SMTHash2();
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component oldSwitcher = Switcher();
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component newSwitcher = Switcher();
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// Old side
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oldSwitcher.L <== oldChild;
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oldSwitcher.R <== sibling;
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oldSwitcher.sel <== newlrbit;
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oldProofHash.L <== oldSwitcher.outL;
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oldProofHash.R <== oldSwitcher.outR;
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aux[0] <== old1leaf * (st_bot + st_new1 + st_upd);
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oldRoot <== aux[0] + oldProofHash.out * st_top;
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// New side
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aux[1] <== newChild * ( st_top + st_bot);
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newSwitcher.L <== aux[1] + new1leaf*st_new1;
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aux[2] <== sibling*st_top;
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newSwitcher.R <== aux[2] + old1leaf*st_new1;
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newSwitcher.sel <== newlrbit;
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newProofHash.L <== newSwitcher.outL;
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newProofHash.R <== newSwitcher.outR;
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aux[3] <== newProofHash.out * (st_top + st_bot + st_new1);
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newRoot <== aux[3] + new1leaf * (st_old0 + st_upd);
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}
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