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Add BDD Arithmetic (#98)

Browse Source 
* Added some circuit, evaluation + some layouts

* Refactor + memory reduction

* Rows -> Dnum, Digits -> Dsize

* fix #96 + glwe_packing (indirectly CBT)

* clippy
This commit is contained in:
Jean-Philippe Bossuat
2025-10-08 17:52:03 +02:00
committed by GitHub
parent 37e13b965c
commit 6357a05509
119 changed files with 15996 additions and 1659 deletions
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poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/add_codegen.rs Normal file
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poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/and_codegen.rs Normal file
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use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<3, 2>),
B1(BitCircuit<3, 2>),
B2(BitCircuit<3, 2>),
B3(BitCircuit<3, 2>),
B4(BitCircuit<3, 2>),
B5(BitCircuit<3, 2>),
B6(BitCircuit<3, 2>),
B7(BitCircuit<3, 2>),
B8(BitCircuit<3, 2>),
B9(BitCircuit<3, 2>),
B10(BitCircuit<3, 2>),
B11(BitCircuit<3, 2>),
B12(BitCircuit<3, 2>),
B13(BitCircuit<3, 2>),
B14(BitCircuit<3, 2>),
B15(BitCircuit<3, 2>),
B16(BitCircuit<3, 2>),
B17(BitCircuit<3, 2>),
B18(BitCircuit<3, 2>),
B19(BitCircuit<3, 2>),
B20(BitCircuit<3, 2>),
B21(BitCircuit<3, 2>),
B22(BitCircuit<3, 2>),
B23(BitCircuit<3, 2>),
B24(BitCircuit<3, 2>),
B25(BitCircuit<3, 2>),
B26(BitCircuit<3, 2>),
B27(BitCircuit<3, 2>),
B28(BitCircuit<3, 2>),
B29(BitCircuit<3, 2>),
B30(BitCircuit<3, 2>),
B31(BitCircuit<3, 2>),
}
impl BitCircuitInfo for AnyBitCircuit {
fn info(&self) -> (&[Node], &[usize], usize) {
match self {
AnyBitCircuit::B0(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B1(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B2(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B3(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B4(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B5(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B6(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B7(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B8(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B9(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B10(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B11(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B12(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B13(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B14(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B15(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B16(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B17(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B18(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B19(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B20(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B21(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B22(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B23(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B24(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B25(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B26(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B27(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B28(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B29(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B30(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
AnyBitCircuit::B31(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
}
}
}
impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 32usize> {
fn input_size(&self) -> usize {
2 * u32::BITS as usize
}
fn output_size(&self) -> usize {
u32::BITS as usize
}
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
self.0[bit].info()
}
}
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 32usize> = Circuit([
AnyBitCircuit::B0(BitCircuit::new(
[Node::new(0, 0, 0), Node::new(32, 1, 0), Node::new(0, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B1(BitCircuit::new(
[Node::new(1, 0, 0), Node::new(33, 1, 0), Node::new(1, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B2(BitCircuit::new(
[Node::new(2, 0, 0), Node::new(34, 1, 0), Node::new(2, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B3(BitCircuit::new(
[Node::new(3, 0, 0), Node::new(35, 1, 0), Node::new(3, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B4(BitCircuit::new(
[Node::new(4, 0, 0), Node::new(36, 1, 0), Node::new(4, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B5(BitCircuit::new(
[Node::new(5, 0, 0), Node::new(37, 1, 0), Node::new(5, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B6(BitCircuit::new(
[Node::new(6, 0, 0), Node::new(38, 1, 0), Node::new(6, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B7(BitCircuit::new(
[Node::new(7, 0, 0), Node::new(39, 1, 0), Node::new(7, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B8(BitCircuit::new(
[Node::new(8, 0, 0), Node::new(40, 1, 0), Node::new(8, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B9(BitCircuit::new(
[Node::new(9, 0, 0), Node::new(41, 1, 0), Node::new(9, 1, 0)],
[0, 2],
2,
)),
AnyBitCircuit::B10(BitCircuit::new(
[
Node::new(10, 0, 0),
Node::new(42, 1, 0),
Node::new(10, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B11(BitCircuit::new(
[
Node::new(11, 0, 0),
Node::new(43, 1, 0),
Node::new(11, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B12(BitCircuit::new(
[
Node::new(12, 0, 0),
Node::new(44, 1, 0),
Node::new(12, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B13(BitCircuit::new(
[
Node::new(13, 0, 0),
Node::new(45, 1, 0),
Node::new(13, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B14(BitCircuit::new(
[
Node::new(14, 0, 0),
Node::new(46, 1, 0),
Node::new(14, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B15(BitCircuit::new(
[
Node::new(15, 0, 0),
Node::new(47, 1, 0),
Node::new(15, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B16(BitCircuit::new(
[
Node::new(16, 0, 0),
Node::new(48, 1, 0),
Node::new(16, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B17(BitCircuit::new(
[
Node::new(17, 0, 0),
Node::new(49, 1, 0),
Node::new(17, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B18(BitCircuit::new(
[
Node::new(18, 0, 0),
Node::new(50, 1, 0),
Node::new(18, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B19(BitCircuit::new(
[
Node::new(19, 0, 0),
Node::new(51, 1, 0),
Node::new(19, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B20(BitCircuit::new(
[
Node::new(20, 0, 0),
Node::new(52, 1, 0),
Node::new(20, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B21(BitCircuit::new(
[
Node::new(21, 0, 0),
Node::new(53, 1, 0),
Node::new(21, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B22(BitCircuit::new(
[
Node::new(22, 0, 0),
Node::new(54, 1, 0),
Node::new(22, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B23(BitCircuit::new(
[
Node::new(23, 0, 0),
Node::new(55, 1, 0),
Node::new(23, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B24(BitCircuit::new(
[
Node::new(24, 0, 0),
Node::new(56, 1, 0),
Node::new(24, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B25(BitCircuit::new(
[
Node::new(25, 0, 0),
Node::new(57, 1, 0),
Node::new(25, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B26(BitCircuit::new(
[
Node::new(26, 0, 0),
Node::new(58, 1, 0),
Node::new(26, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B27(BitCircuit::new(
[
Node::new(27, 0, 0),
Node::new(59, 1, 0),
Node::new(27, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B28(BitCircuit::new(
[
Node::new(28, 0, 0),
Node::new(60, 1, 0),
Node::new(28, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B29(BitCircuit::new(
[
Node::new(29, 0, 0),
Node::new(61, 1, 0),
Node::new(29, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B30(BitCircuit::new(
[
Node::new(30, 0, 0),
Node::new(62, 1, 0),
Node::new(30, 1, 0),
],
[0, 2],
2,
)),
AnyBitCircuit::B31(BitCircuit::new(
[
Node::new(31, 0, 0),
Node::new(63, 1, 0),
Node::new(31, 1, 0),
],
[0, 2],
2,
)),
]);

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poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/mod.rs Normal file
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pub(crate) mod add_codegen;
pub(crate) mod and_codegen;
pub(crate) mod or_codegen;
pub(crate) mod sll_codegen;
pub(crate) mod slt_codegen;
pub(crate) mod sltu_codegen;
pub(crate) mod sra_codegen;
pub(crate) mod srl_codegen;
pub(crate) mod sub_codegen;
pub(crate) mod xor_codegen;

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poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/or_codegen.rs Normal file
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use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<3, 2>),
}
impl BitCircuitInfo for AnyBitCircuit {
fn info(&self) -> (&[Node], &[usize], usize) {
match self {
AnyBitCircuit::B0(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
}
}
}
impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
fn input_size(&self) -> usize {
2 * u32::BITS as usize
}
fn output_size(&self) -> usize {
u32::BITS as usize
}
fn get_circuit(&self, _bit: usize) -> (&[Node], &[usize], usize) {
self.0[0].info()
}
}
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
[Node::new(0, 0, 0), Node::new(1, 1, 0), Node::new(0, 1, 1)],
[0, 2],
2,
))]);

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use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<219, 64>),
}
impl BitCircuitInfo for AnyBitCircuit {
fn info(&self) -> (&[Node], &[usize], usize) {
match self {
AnyBitCircuit::B0(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
}
}
}
impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
fn input_size(&self) -> usize {
2 * u32::BITS as usize
}
fn output_size(&self) -> usize {
1
}
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
self.0[bit].info()
}
}
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
[
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(32, 1, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(0, 0, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(33, 1, 2),
Node::new(33, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(1, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(34, 1, 2),
Node::new(34, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(2, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(35, 2, 0),
Node::new(35, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(3, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(36, 1, 2),
Node::new(36, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(4, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(37, 1, 2),
Node::new(37, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(5, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(38, 2, 0),
Node::new(38, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(6, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(39, 2, 0),
Node::new(39, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(7, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(40, 1, 2),
Node::new(40, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(8, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(41, 1, 2),
Node::new(41, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(9, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(42, 2, 0),
Node::new(42, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(10, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(43, 2, 0),
Node::new(43, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(11, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(44, 1, 2),
Node::new(44, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(12, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(45, 1, 2),
Node::new(45, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(13, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(46, 2, 0),
Node::new(46, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(14, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(47, 1, 2),
Node::new(47, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(15, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(48, 2, 0),
Node::new(48, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(16, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(49, 1, 2),
Node::new(49, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(17, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(50, 2, 0),
Node::new(50, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(18, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(51, 2, 0),
Node::new(51, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(19, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(52, 1, 2),
Node::new(52, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(20, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(53, 2, 0),
Node::new(53, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(21, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(54, 1, 2),
Node::new(54, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(22, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(55, 1, 2),
Node::new(55, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(23, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(56, 2, 0),
Node::new(56, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(24, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(57, 1, 2),
Node::new(57, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(25, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(58, 2, 0),
Node::new(58, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(26, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(59, 2, 0),
Node::new(59, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(27, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(60, 2, 0),
Node::new(60, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(28, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(61, 1, 2),
Node::new(61, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(29, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(62, 1, 2),
Node::new(62, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(30, 3, 2),
Node::new(63, 2, 1),
Node::new(63, 0, 2),
Node::new(31, 0, 1),
],
[
0, 3, 6, 10, 13, 17, 20, 24, 27, 31, 34, 38, 41, 45, 48, 52, 55, 59, 62, 66, 69, 73, 76, 80, 83, 87, 90, 94, 97, 101,
104, 108, 111, 115, 118, 122, 125, 129, 132, 136, 139, 143, 146, 150, 153, 157, 160, 164, 167, 171, 174, 178, 181, 185,
188, 192, 195, 199, 202, 206, 209, 213, 216, 218,
],
4,
))]);

257
poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/sltu_codegen.rs Normal file
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@@ -0,0 +1,257 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<219, 64>),
}
impl BitCircuitInfo for AnyBitCircuit {
fn info(&self) -> (&[Node], &[usize], usize) {
match self {
AnyBitCircuit::B0(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
}
}
}
impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
fn input_size(&self) -> usize {
2 * u32::BITS as usize
}
fn output_size(&self) -> usize {
1
}
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
self.0[bit].info()
}
}
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
[
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(32, 1, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(0, 0, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(33, 2, 0),
Node::new(33, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(1, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(34, 2, 0),
Node::new(34, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(2, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(35, 1, 2),
Node::new(35, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(3, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(36, 2, 0),
Node::new(36, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(4, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(37, 2, 0),
Node::new(37, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(5, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(38, 1, 2),
Node::new(38, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(6, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(39, 2, 0),
Node::new(39, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(7, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(40, 1, 2),
Node::new(40, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(8, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(41, 1, 2),
Node::new(41, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(9, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(42, 1, 2),
Node::new(42, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(10, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(43, 2, 0),
Node::new(43, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(11, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(44, 1, 2),
Node::new(44, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(12, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(45, 2, 0),
Node::new(45, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(13, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(46, 1, 2),
Node::new(46, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(14, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(47, 2, 0),
Node::new(47, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(15, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(48, 2, 0),
Node::new(48, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(16, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(49, 1, 2),
Node::new(49, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(17, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(50, 1, 2),
Node::new(50, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(18, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(51, 1, 2),
Node::new(51, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(19, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(52, 2, 0),
Node::new(52, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(20, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(53, 2, 0),
Node::new(53, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(21, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(54, 2, 0),
Node::new(54, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(22, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(55, 1, 2),
Node::new(55, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(23, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(56, 2, 0),
Node::new(56, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(24, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(57, 1, 2),
Node::new(57, 2, 0),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(25, 3, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(58, 2, 0),
Node::new(58, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(26, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(59, 2, 0),
Node::new(59, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(27, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(60, 2, 0),
Node::new(60, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(28, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(61, 2, 0),
Node::new(61, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(29, 2, 3),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(62, 2, 0),
Node::new(62, 1, 2),
Node::new(0, 0, 0),
Node::new(0, 1, 1),
Node::new(30, 2, 3),
Node::new(63, 2, 0),
Node::new(63, 1, 2),
Node::new(31, 0, 1),
],
[
0, 3, 6, 10, 13, 17, 20, 24, 27, 31, 34, 38, 41, 45, 48, 52, 55, 59, 62, 66, 69, 73, 76, 80, 83, 87, 90, 94, 97, 101,
104, 108, 111, 115, 118, 122, 125, 129, 132, 136, 139, 143, 146, 150, 153, 157, 160, 164, 167, 171, 174, 178, 181, 185,
188, 192, 195, 199, 202, 206, 209, 213, 216, 218,
],
4,
))]);

1762
poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/sra_codegen.rs Normal file
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File diff suppressed because it is too large Load Diff

1830
poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/srl_codegen.rs Normal file
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File diff suppressed because it is too large Load Diff

3019
poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/sub_codegen.rs Normal file
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File diff suppressed because it is too large Load Diff

34
poulpy-schemes/src/tfhe/bdd_arithmetic/circuits/u32/xor_codegen.rs Normal file
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@@ -0,0 +1,34 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<3, 2>),
}
impl BitCircuitInfo for AnyBitCircuit {
fn info(&self) -> (&[Node], &[usize], usize) {
match self {
AnyBitCircuit::B0(bit_circuit) => (
bit_circuit.nodes.as_ref(),
bit_circuit.levels.as_ref(),
bit_circuit.max_inter_state,
),
}
}
}
impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
fn input_size(&self) -> usize {
2 * u32::BITS as usize
}
fn output_size(&self) -> usize {
u32::BITS as usize
}
fn get_circuit(&self, _bit: usize) -> (&[Node], &[usize], usize) {
self.0[0].info()
}
}
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
[Node::new(1, 1, 0), Node::new(1, 0, 1), Node::new(0, 1, 0)],
[0, 2],
2,
))]);