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update BDD circuits & fix non-zero scratch related bug
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@@ -1,201 +1,73 @@
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use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
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pub(crate) enum AnyBitCircuit {
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B0(BitCircuit<3, 2>),
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B1(BitCircuit<3, 2>),
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B2(BitCircuit<3, 2>),
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B3(BitCircuit<3, 2>),
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B4(BitCircuit<3, 2>),
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B5(BitCircuit<3, 2>),
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B6(BitCircuit<3, 2>),
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B7(BitCircuit<3, 2>),
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B8(BitCircuit<3, 2>),
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B9(BitCircuit<3, 2>),
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B10(BitCircuit<3, 2>),
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B11(BitCircuit<3, 2>),
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B12(BitCircuit<3, 2>),
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B13(BitCircuit<3, 2>),
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B14(BitCircuit<3, 2>),
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B15(BitCircuit<3, 2>),
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B16(BitCircuit<3, 2>),
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B17(BitCircuit<3, 2>),
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B18(BitCircuit<3, 2>),
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B19(BitCircuit<3, 2>),
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B20(BitCircuit<3, 2>),
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B21(BitCircuit<3, 2>),
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B22(BitCircuit<3, 2>),
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B23(BitCircuit<3, 2>),
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B24(BitCircuit<3, 2>),
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B25(BitCircuit<3, 2>),
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B26(BitCircuit<3, 2>),
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B27(BitCircuit<3, 2>),
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B28(BitCircuit<3, 2>),
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B29(BitCircuit<3, 2>),
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B30(BitCircuit<3, 2>),
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B31(BitCircuit<3, 2>),
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B0(BitCircuit<4>),
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B1(BitCircuit<4>),
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B2(BitCircuit<4>),
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B3(BitCircuit<4>),
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B4(BitCircuit<4>),
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B5(BitCircuit<4>),
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B6(BitCircuit<4>),
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B7(BitCircuit<4>),
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B8(BitCircuit<4>),
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B9(BitCircuit<4>),
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B10(BitCircuit<4>),
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B11(BitCircuit<4>),
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B12(BitCircuit<4>),
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B13(BitCircuit<4>),
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B14(BitCircuit<4>),
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B15(BitCircuit<4>),
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B16(BitCircuit<4>),
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B17(BitCircuit<4>),
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B18(BitCircuit<4>),
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B19(BitCircuit<4>),
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B20(BitCircuit<4>),
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B21(BitCircuit<4>),
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B22(BitCircuit<4>),
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B23(BitCircuit<4>),
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B24(BitCircuit<4>),
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B25(BitCircuit<4>),
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B26(BitCircuit<4>),
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B27(BitCircuit<4>),
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B28(BitCircuit<4>),
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B29(BitCircuit<4>),
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B30(BitCircuit<4>),
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B31(BitCircuit<4>),
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}
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impl BitCircuitInfo for AnyBitCircuit {
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fn info(&self) -> (&[Node], &[usize], usize) {
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fn info(&self) -> (&[Node], usize) {
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match self {
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AnyBitCircuit::B0(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B1(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B2(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B3(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B4(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B5(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B6(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B7(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B8(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B9(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B10(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B11(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B12(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B13(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B14(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B15(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B16(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B17(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B18(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B19(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B20(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B21(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B22(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B23(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B24(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B25(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B26(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B27(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B28(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B29(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B30(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B31(bit_circuit) => (
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bit_circuit.nodes.as_ref(),
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bit_circuit.levels.as_ref(),
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bit_circuit.max_inter_state,
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),
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AnyBitCircuit::B0(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B1(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B2(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B3(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B4(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B5(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B6(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B7(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B8(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B9(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B10(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B11(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B12(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B13(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B14(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B15(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B16(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B17(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B18(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B19(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B20(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B21(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B22(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B23(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B24(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B25(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B26(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B27(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B28(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B29(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B30(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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AnyBitCircuit::B31(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
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}
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}
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}
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@@ -207,170 +79,298 @@ impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 32usize> {
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fn output_size(&self) -> usize {
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u32::BITS as usize
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}
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fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
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fn get_circuit(&self, bit: usize) -> (&[Node], usize) {
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self.0[bit].info()
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}
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}
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pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 32usize> = Circuit([
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AnyBitCircuit::B0(BitCircuit::new(
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[Node::new(0, 0, 0), Node::new(32, 1, 0), Node::new(0, 1, 0)],
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[0, 2],
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[
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Node::Copy,
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Node::Cmux(32, 1, 0),
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Node::Cmux(0, 1, 0),
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Node::None,
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],
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2,
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)),
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AnyBitCircuit::B1(BitCircuit::new(
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[Node::new(0, 0, 0), Node::new(33, 1, 0), Node::new(1, 1, 0)],
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[0, 2],
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[
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Node::Copy,
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Node::Cmux(33, 1, 0),
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Node::Cmux(1, 1, 0),
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Node::None,
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],
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2,
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)),
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AnyBitCircuit::B2(BitCircuit::new(
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[Node::new(0, 0, 0), Node::new(34, 1, 0), Node::new(2, 1, 0)],
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[0, 2],
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[
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Node::Copy,
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Node::Cmux(34, 1, 0),
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Node::Cmux(2, 1, 0),
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Node::None,
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],
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2,
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)),
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AnyBitCircuit::B3(BitCircuit::new(
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[Node::new(0, 0, 0), Node::new(35, 1, 0), Node::new(3, 1, 0)],
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[0, 2],
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[
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Node::Copy,
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Node::Cmux(35, 1, 0),
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Node::Cmux(3, 1, 0),
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Node::None,
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],
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2,
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)),
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AnyBitCircuit::B4(BitCircuit::new(
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[Node::new(0, 0, 0), Node::new(36, 1, 0), Node::new(4, 1, 0)],
|
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[0, 2],
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[
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Node::Copy,
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Node::Cmux(36, 1, 0),
|
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Node::Cmux(4, 1, 0),
|
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Node::None,
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],
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2,
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)),
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AnyBitCircuit::B5(BitCircuit::new(
|
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[Node::new(0, 0, 0), Node::new(37, 1, 0), Node::new(5, 1, 0)],
|
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[0, 2],
|
||||
[
|
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Node::Copy,
|
||||
Node::Cmux(37, 1, 0),
|
||||
Node::Cmux(5, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
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AnyBitCircuit::B6(BitCircuit::new(
|
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[Node::new(0, 0, 0), Node::new(38, 1, 0), Node::new(6, 1, 0)],
|
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[0, 2],
|
||||
[
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Node::Copy,
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||||
Node::Cmux(38, 1, 0),
|
||||
Node::Cmux(6, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
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AnyBitCircuit::B7(BitCircuit::new(
|
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[Node::new(0, 0, 0), Node::new(39, 1, 0), Node::new(7, 1, 0)],
|
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[0, 2],
|
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[
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Node::Copy,
|
||||
Node::Cmux(39, 1, 0),
|
||||
Node::Cmux(7, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
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AnyBitCircuit::B8(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(40, 1, 0), Node::new(8, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(40, 1, 0),
|
||||
Node::Cmux(8, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B9(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(41, 1, 0), Node::new(9, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(41, 1, 0),
|
||||
Node::Cmux(9, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B10(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(42, 1, 0), Node::new(10, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(42, 1, 0),
|
||||
Node::Cmux(10, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B11(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(43, 1, 0), Node::new(11, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(43, 1, 0),
|
||||
Node::Cmux(11, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B12(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(44, 1, 0), Node::new(12, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(44, 1, 0),
|
||||
Node::Cmux(12, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B13(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(45, 1, 0), Node::new(13, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(45, 1, 0),
|
||||
Node::Cmux(13, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B14(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(46, 1, 0), Node::new(14, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(46, 1, 0),
|
||||
Node::Cmux(14, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B15(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(47, 1, 0), Node::new(15, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(47, 1, 0),
|
||||
Node::Cmux(15, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B16(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(48, 1, 0), Node::new(16, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(48, 1, 0),
|
||||
Node::Cmux(16, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B17(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(49, 1, 0), Node::new(17, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(49, 1, 0),
|
||||
Node::Cmux(17, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B18(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(50, 1, 0), Node::new(18, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(50, 1, 0),
|
||||
Node::Cmux(18, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B19(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(51, 1, 0), Node::new(19, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(51, 1, 0),
|
||||
Node::Cmux(19, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B20(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(52, 1, 0), Node::new(20, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(52, 1, 0),
|
||||
Node::Cmux(20, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B21(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(53, 1, 0), Node::new(21, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(53, 1, 0),
|
||||
Node::Cmux(21, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B22(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(54, 1, 0), Node::new(22, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(54, 1, 0),
|
||||
Node::Cmux(22, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B23(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(55, 1, 0), Node::new(23, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(55, 1, 0),
|
||||
Node::Cmux(23, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B24(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(56, 1, 0), Node::new(24, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(56, 1, 0),
|
||||
Node::Cmux(24, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B25(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(57, 1, 0), Node::new(25, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(57, 1, 0),
|
||||
Node::Cmux(25, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B26(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(58, 1, 0), Node::new(26, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(58, 1, 0),
|
||||
Node::Cmux(26, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B27(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(59, 1, 0), Node::new(27, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(59, 1, 0),
|
||||
Node::Cmux(27, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B28(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(60, 1, 0), Node::new(28, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(60, 1, 0),
|
||||
Node::Cmux(28, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B29(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(61, 1, 0), Node::new(29, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(61, 1, 0),
|
||||
Node::Cmux(29, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B30(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(62, 1, 0), Node::new(30, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(62, 1, 0),
|
||||
Node::Cmux(30, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B31(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(63, 1, 0), Node::new(31, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Copy,
|
||||
Node::Cmux(63, 1, 0),
|
||||
Node::Cmux(31, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
]);
|
||||
|
||||
@@ -1,201 +1,73 @@
|
||||
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
|
||||
pub(crate) enum AnyBitCircuit {
|
||||
B0(BitCircuit<3, 2>),
|
||||
B1(BitCircuit<3, 2>),
|
||||
B2(BitCircuit<3, 2>),
|
||||
B3(BitCircuit<3, 2>),
|
||||
B4(BitCircuit<3, 2>),
|
||||
B5(BitCircuit<3, 2>),
|
||||
B6(BitCircuit<3, 2>),
|
||||
B7(BitCircuit<3, 2>),
|
||||
B8(BitCircuit<3, 2>),
|
||||
B9(BitCircuit<3, 2>),
|
||||
B10(BitCircuit<3, 2>),
|
||||
B11(BitCircuit<3, 2>),
|
||||
B12(BitCircuit<3, 2>),
|
||||
B13(BitCircuit<3, 2>),
|
||||
B14(BitCircuit<3, 2>),
|
||||
B15(BitCircuit<3, 2>),
|
||||
B16(BitCircuit<3, 2>),
|
||||
B17(BitCircuit<3, 2>),
|
||||
B18(BitCircuit<3, 2>),
|
||||
B19(BitCircuit<3, 2>),
|
||||
B20(BitCircuit<3, 2>),
|
||||
B21(BitCircuit<3, 2>),
|
||||
B22(BitCircuit<3, 2>),
|
||||
B23(BitCircuit<3, 2>),
|
||||
B24(BitCircuit<3, 2>),
|
||||
B25(BitCircuit<3, 2>),
|
||||
B26(BitCircuit<3, 2>),
|
||||
B27(BitCircuit<3, 2>),
|
||||
B28(BitCircuit<3, 2>),
|
||||
B29(BitCircuit<3, 2>),
|
||||
B30(BitCircuit<3, 2>),
|
||||
B31(BitCircuit<3, 2>),
|
||||
B0(BitCircuit<4>),
|
||||
B1(BitCircuit<4>),
|
||||
B2(BitCircuit<4>),
|
||||
B3(BitCircuit<4>),
|
||||
B4(BitCircuit<4>),
|
||||
B5(BitCircuit<4>),
|
||||
B6(BitCircuit<4>),
|
||||
B7(BitCircuit<4>),
|
||||
B8(BitCircuit<4>),
|
||||
B9(BitCircuit<4>),
|
||||
B10(BitCircuit<4>),
|
||||
B11(BitCircuit<4>),
|
||||
B12(BitCircuit<4>),
|
||||
B13(BitCircuit<4>),
|
||||
B14(BitCircuit<4>),
|
||||
B15(BitCircuit<4>),
|
||||
B16(BitCircuit<4>),
|
||||
B17(BitCircuit<4>),
|
||||
B18(BitCircuit<4>),
|
||||
B19(BitCircuit<4>),
|
||||
B20(BitCircuit<4>),
|
||||
B21(BitCircuit<4>),
|
||||
B22(BitCircuit<4>),
|
||||
B23(BitCircuit<4>),
|
||||
B24(BitCircuit<4>),
|
||||
B25(BitCircuit<4>),
|
||||
B26(BitCircuit<4>),
|
||||
B27(BitCircuit<4>),
|
||||
B28(BitCircuit<4>),
|
||||
B29(BitCircuit<4>),
|
||||
B30(BitCircuit<4>),
|
||||
B31(BitCircuit<4>),
|
||||
}
|
||||
impl BitCircuitInfo for AnyBitCircuit {
|
||||
fn info(&self) -> (&[Node], &[usize], usize) {
|
||||
fn info(&self) -> (&[Node], usize) {
|
||||
match self {
|
||||
AnyBitCircuit::B0(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B1(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B2(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B3(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B4(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B5(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B6(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B7(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B8(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B9(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B10(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B11(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B12(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B13(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B14(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B15(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B16(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B17(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B18(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B19(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B20(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B21(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B22(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B23(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B24(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B25(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B26(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B27(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B28(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B29(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B30(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B31(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B0(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B1(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B2(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B3(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B4(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B5(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B6(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B7(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B8(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B9(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B10(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B11(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B12(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B13(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B14(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B15(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B16(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B17(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B18(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B19(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B20(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B21(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B22(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B23(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B24(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B25(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B26(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B27(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B28(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B29(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B30(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B31(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -207,170 +79,298 @@ impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 32usize> {
|
||||
fn output_size(&self) -> usize {
|
||||
u32::BITS as usize
|
||||
}
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], usize) {
|
||||
self.0[bit].info()
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 32usize> = Circuit([
|
||||
AnyBitCircuit::B0(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(32, 1, 0), Node::new(0, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(32, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(0, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B1(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(33, 1, 0), Node::new(1, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(33, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(1, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B2(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(34, 1, 0), Node::new(2, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(34, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(2, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B3(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(35, 1, 0), Node::new(3, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(35, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(3, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B4(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(36, 1, 0), Node::new(4, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(36, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(4, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B5(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(37, 1, 0), Node::new(5, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(37, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(5, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B6(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(38, 1, 0), Node::new(6, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(38, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(6, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B7(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(39, 1, 0), Node::new(7, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(39, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(7, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B8(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(40, 1, 0), Node::new(8, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(40, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(8, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B9(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(41, 1, 0), Node::new(9, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(41, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(9, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B10(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(42, 1, 0), Node::new(10, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(42, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(10, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B11(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(43, 1, 0), Node::new(11, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(43, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(11, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B12(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(44, 1, 0), Node::new(12, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(44, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(12, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B13(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(45, 1, 0), Node::new(13, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(45, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(13, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B14(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(46, 1, 0), Node::new(14, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(46, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(14, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B15(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(47, 1, 0), Node::new(15, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(47, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(15, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B16(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(48, 1, 0), Node::new(16, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(48, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(16, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B17(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(49, 1, 0), Node::new(17, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(49, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(17, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B18(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(50, 1, 0), Node::new(18, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(50, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(18, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B19(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(51, 1, 0), Node::new(19, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(51, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(19, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B20(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(52, 1, 0), Node::new(20, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(52, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(20, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B21(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(53, 1, 0), Node::new(21, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(53, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(21, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B22(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(54, 1, 0), Node::new(22, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(54, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(22, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B23(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(55, 1, 0), Node::new(23, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(55, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(23, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B24(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(56, 1, 0), Node::new(24, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(56, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(24, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B25(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(57, 1, 0), Node::new(25, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(57, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(25, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B26(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(58, 1, 0), Node::new(26, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(58, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(26, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B27(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(59, 1, 0), Node::new(27, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(59, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(27, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B28(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(60, 1, 0), Node::new(28, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(60, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(28, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B29(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(61, 1, 0), Node::new(29, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(61, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(29, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B30(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(62, 1, 0), Node::new(30, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(62, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(30, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B31(BitCircuit::new(
|
||||
[Node::new(0, 0, 0), Node::new(63, 1, 0), Node::new(31, 1, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(63, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Cmux(31, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
]);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,15 +1,11 @@
|
||||
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
|
||||
pub(crate) enum AnyBitCircuit {
|
||||
B0(BitCircuit<219, 64>),
|
||||
B0(BitCircuit<256>),
|
||||
}
|
||||
impl BitCircuitInfo for AnyBitCircuit {
|
||||
fn info(&self) -> (&[Node], &[usize], usize) {
|
||||
fn info(&self) -> (&[Node], usize) {
|
||||
match self {
|
||||
AnyBitCircuit::B0(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B0(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -21,237 +17,269 @@ impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
|
||||
fn output_size(&self) -> usize {
|
||||
1
|
||||
}
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], usize) {
|
||||
self.0[bit].info()
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
|
||||
[
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(32, 1, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(0, 0, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(33, 1, 2),
|
||||
Node::new(33, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(1, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(34, 1, 2),
|
||||
Node::new(34, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(2, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(35, 2, 0),
|
||||
Node::new(35, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(3, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(36, 1, 2),
|
||||
Node::new(36, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(4, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(37, 1, 2),
|
||||
Node::new(37, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(5, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(38, 2, 0),
|
||||
Node::new(38, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(6, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(39, 2, 0),
|
||||
Node::new(39, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(7, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(40, 1, 2),
|
||||
Node::new(40, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(8, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(41, 1, 2),
|
||||
Node::new(41, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(9, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(42, 2, 0),
|
||||
Node::new(42, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(10, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(43, 2, 0),
|
||||
Node::new(43, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(11, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(44, 1, 2),
|
||||
Node::new(44, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(12, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(45, 1, 2),
|
||||
Node::new(45, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(13, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(46, 2, 0),
|
||||
Node::new(46, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(14, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(47, 1, 2),
|
||||
Node::new(47, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(15, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(48, 2, 0),
|
||||
Node::new(48, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(16, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(49, 1, 2),
|
||||
Node::new(49, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(17, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(50, 2, 0),
|
||||
Node::new(50, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(18, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(51, 2, 0),
|
||||
Node::new(51, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(19, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(52, 1, 2),
|
||||
Node::new(52, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(20, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(53, 2, 0),
|
||||
Node::new(53, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(21, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(54, 1, 2),
|
||||
Node::new(54, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(22, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(55, 1, 2),
|
||||
Node::new(55, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(23, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(56, 2, 0),
|
||||
Node::new(56, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(24, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(57, 1, 2),
|
||||
Node::new(57, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(25, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(58, 2, 0),
|
||||
Node::new(58, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(26, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(59, 2, 0),
|
||||
Node::new(59, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(27, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(60, 2, 0),
|
||||
Node::new(60, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(28, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(61, 1, 2),
|
||||
Node::new(61, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(29, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(62, 1, 2),
|
||||
Node::new(62, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(30, 3, 2),
|
||||
Node::new(63, 2, 1),
|
||||
Node::new(63, 0, 2),
|
||||
Node::new(31, 0, 1),
|
||||
],
|
||||
[
|
||||
0, 3, 6, 10, 13, 17, 20, 24, 27, 31, 34, 38, 41, 45, 48, 52, 55, 59, 62, 66, 69, 73, 76, 80, 83, 87, 90, 94, 97, 101,
|
||||
104, 108, 111, 115, 118, 122, 125, 129, 132, 136, 139, 143, 146, 150, 153, 157, 160, 164, 167, 171, 174, 178, 181, 185,
|
||||
188, 192, 195, 199, 202, 206, 209, 213, 216, 218,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(32, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(0, 0, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(33, 3, 0),
|
||||
Node::Cmux(33, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(1, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(34, 1, 2),
|
||||
Node::Cmux(34, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(2, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(35, 1, 3),
|
||||
Node::Cmux(35, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(3, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(36, 1, 2),
|
||||
Node::Cmux(36, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(4, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(37, 1, 2),
|
||||
Node::Cmux(37, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(5, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(38, 1, 2),
|
||||
Node::Cmux(38, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(6, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(39, 1, 3),
|
||||
Node::Cmux(39, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(7, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(40, 3, 0),
|
||||
Node::Cmux(40, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(8, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(41, 1, 3),
|
||||
Node::Cmux(41, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(9, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(42, 1, 3),
|
||||
Node::Cmux(42, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(10, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(43, 1, 2),
|
||||
Node::Cmux(43, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(11, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(44, 2, 0),
|
||||
Node::Cmux(44, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(12, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(45, 2, 0),
|
||||
Node::Cmux(45, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(13, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(46, 1, 3),
|
||||
Node::Cmux(46, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(14, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(47, 2, 0),
|
||||
Node::Cmux(47, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(15, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(48, 2, 0),
|
||||
Node::Cmux(48, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(16, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(49, 1, 2),
|
||||
Node::Cmux(49, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(17, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(50, 1, 2),
|
||||
Node::Cmux(50, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(18, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(51, 2, 0),
|
||||
Node::Cmux(51, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(19, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(52, 1, 2),
|
||||
Node::Cmux(52, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(20, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(53, 1, 3),
|
||||
Node::Cmux(53, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(21, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(54, 1, 3),
|
||||
Node::Cmux(54, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(22, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(55, 3, 0),
|
||||
Node::Cmux(55, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(23, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(56, 2, 0),
|
||||
Node::Cmux(56, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(24, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(57, 2, 0),
|
||||
Node::Cmux(57, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(25, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(58, 1, 3),
|
||||
Node::Cmux(58, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(26, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(59, 1, 2),
|
||||
Node::Cmux(59, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(27, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(60, 3, 0),
|
||||
Node::Cmux(60, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(28, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(61, 2, 0),
|
||||
Node::Cmux(61, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(29, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(62, 1, 3),
|
||||
Node::Cmux(62, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(30, 3, 2),
|
||||
Node::Cmux(63, 3, 1),
|
||||
Node::None,
|
||||
Node::None,
|
||||
Node::Cmux(63, 0, 3),
|
||||
Node::Cmux(31, 0, 3),
|
||||
Node::None,
|
||||
Node::None,
|
||||
Node::None,
|
||||
],
|
||||
4,
|
||||
))]);
|
||||
|
||||
@@ -1,15 +1,11 @@
|
||||
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
|
||||
pub(crate) enum AnyBitCircuit {
|
||||
B0(BitCircuit<219, 64>),
|
||||
B0(BitCircuit<256>),
|
||||
}
|
||||
impl BitCircuitInfo for AnyBitCircuit {
|
||||
fn info(&self) -> (&[Node], &[usize], usize) {
|
||||
fn info(&self) -> (&[Node], usize) {
|
||||
match self {
|
||||
AnyBitCircuit::B0(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B0(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -21,237 +17,269 @@ impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 1usize> {
|
||||
fn output_size(&self) -> usize {
|
||||
1
|
||||
}
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], usize) {
|
||||
self.0[bit].info()
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 1usize> = Circuit([AnyBitCircuit::B0(BitCircuit::new(
|
||||
[
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(32, 1, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(0, 0, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(33, 2, 0),
|
||||
Node::new(33, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(1, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(34, 2, 0),
|
||||
Node::new(34, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(2, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(35, 1, 2),
|
||||
Node::new(35, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(3, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(36, 2, 0),
|
||||
Node::new(36, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(4, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(37, 2, 0),
|
||||
Node::new(37, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(5, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(38, 1, 2),
|
||||
Node::new(38, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(6, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(39, 2, 0),
|
||||
Node::new(39, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(7, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(40, 1, 2),
|
||||
Node::new(40, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(8, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(41, 1, 2),
|
||||
Node::new(41, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(9, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(42, 1, 2),
|
||||
Node::new(42, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(10, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(43, 2, 0),
|
||||
Node::new(43, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(11, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(44, 1, 2),
|
||||
Node::new(44, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(12, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(45, 2, 0),
|
||||
Node::new(45, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(13, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(46, 1, 2),
|
||||
Node::new(46, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(14, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(47, 2, 0),
|
||||
Node::new(47, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(15, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(48, 2, 0),
|
||||
Node::new(48, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(16, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(49, 1, 2),
|
||||
Node::new(49, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(17, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(50, 1, 2),
|
||||
Node::new(50, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(18, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(51, 1, 2),
|
||||
Node::new(51, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(19, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(52, 2, 0),
|
||||
Node::new(52, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(20, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(53, 2, 0),
|
||||
Node::new(53, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(21, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(54, 2, 0),
|
||||
Node::new(54, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(22, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(55, 1, 2),
|
||||
Node::new(55, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(23, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(56, 2, 0),
|
||||
Node::new(56, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(24, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(57, 1, 2),
|
||||
Node::new(57, 2, 0),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(25, 3, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(58, 2, 0),
|
||||
Node::new(58, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(26, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(59, 2, 0),
|
||||
Node::new(59, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(27, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(60, 2, 0),
|
||||
Node::new(60, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(28, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(61, 2, 0),
|
||||
Node::new(61, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(29, 2, 3),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(62, 2, 0),
|
||||
Node::new(62, 1, 2),
|
||||
Node::new(0, 0, 0),
|
||||
Node::new(0, 1, 1),
|
||||
Node::new(30, 2, 3),
|
||||
Node::new(63, 2, 0),
|
||||
Node::new(63, 1, 2),
|
||||
Node::new(31, 0, 1),
|
||||
],
|
||||
[
|
||||
0, 3, 6, 10, 13, 17, 20, 24, 27, 31, 34, 38, 41, 45, 48, 52, 55, 59, 62, 66, 69, 73, 76, 80, 83, 87, 90, 94, 97, 101,
|
||||
104, 108, 111, 115, 118, 122, 125, 129, 132, 136, 139, 143, 146, 150, 153, 157, 160, 164, 167, 171, 174, 178, 181, 185,
|
||||
188, 192, 195, 199, 202, 206, 209, 213, 216, 218,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(32, 1, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(0, 0, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(33, 1, 2),
|
||||
Node::Cmux(33, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(1, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(34, 1, 2),
|
||||
Node::Cmux(34, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(2, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(35, 2, 0),
|
||||
Node::Cmux(35, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(3, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(36, 3, 0),
|
||||
Node::Cmux(36, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(4, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(37, 1, 2),
|
||||
Node::Cmux(37, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(5, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(38, 2, 0),
|
||||
Node::Cmux(38, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(6, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(39, 1, 2),
|
||||
Node::Cmux(39, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(7, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(40, 1, 2),
|
||||
Node::Cmux(40, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(8, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(41, 1, 3),
|
||||
Node::Cmux(41, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(9, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(42, 2, 0),
|
||||
Node::Cmux(42, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(10, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(43, 1, 3),
|
||||
Node::Cmux(43, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(11, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(44, 3, 0),
|
||||
Node::Cmux(44, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(12, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(45, 3, 0),
|
||||
Node::Cmux(45, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(13, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(46, 2, 0),
|
||||
Node::Cmux(46, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(14, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(47, 2, 0),
|
||||
Node::Cmux(47, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(15, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(48, 1, 2),
|
||||
Node::Cmux(48, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(16, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(49, 2, 0),
|
||||
Node::Cmux(49, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(17, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(50, 1, 2),
|
||||
Node::Cmux(50, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(18, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(51, 2, 0),
|
||||
Node::Cmux(51, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(19, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(52, 1, 3),
|
||||
Node::Cmux(52, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(20, 3, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(53, 3, 0),
|
||||
Node::Cmux(53, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(21, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(54, 2, 0),
|
||||
Node::Cmux(54, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(22, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(55, 3, 0),
|
||||
Node::Cmux(55, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(23, 2, 3),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(56, 2, 0),
|
||||
Node::Cmux(56, 1, 2),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(24, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(57, 3, 0),
|
||||
Node::Cmux(57, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(25, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(58, 3, 0),
|
||||
Node::Cmux(58, 1, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::None,
|
||||
Node::Cmux(26, 2, 3),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(59, 1, 3),
|
||||
Node::Cmux(59, 3, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(27, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(60, 1, 2),
|
||||
Node::Cmux(60, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(28, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(61, 1, 2),
|
||||
Node::Cmux(61, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(29, 3, 2),
|
||||
Node::None,
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(62, 1, 2),
|
||||
Node::Cmux(62, 2, 0),
|
||||
Node::Copy,
|
||||
Node::Copy,
|
||||
Node::Cmux(30, 3, 2),
|
||||
Node::None,
|
||||
Node::Cmux(63, 2, 0),
|
||||
Node::Cmux(63, 1, 2),
|
||||
Node::None,
|
||||
Node::None,
|
||||
Node::Cmux(31, 0, 1),
|
||||
Node::None,
|
||||
Node::None,
|
||||
Node::None,
|
||||
],
|
||||
4,
|
||||
))]);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,201 +1,73 @@
|
||||
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitInfo, Circuit, GetBitCircuitInfo, Node};
|
||||
pub(crate) enum AnyBitCircuit {
|
||||
B0(BitCircuit<3, 2>),
|
||||
B1(BitCircuit<3, 2>),
|
||||
B2(BitCircuit<3, 2>),
|
||||
B3(BitCircuit<3, 2>),
|
||||
B4(BitCircuit<3, 2>),
|
||||
B5(BitCircuit<3, 2>),
|
||||
B6(BitCircuit<3, 2>),
|
||||
B7(BitCircuit<3, 2>),
|
||||
B8(BitCircuit<3, 2>),
|
||||
B9(BitCircuit<3, 2>),
|
||||
B10(BitCircuit<3, 2>),
|
||||
B11(BitCircuit<3, 2>),
|
||||
B12(BitCircuit<3, 2>),
|
||||
B13(BitCircuit<3, 2>),
|
||||
B14(BitCircuit<3, 2>),
|
||||
B15(BitCircuit<3, 2>),
|
||||
B16(BitCircuit<3, 2>),
|
||||
B17(BitCircuit<3, 2>),
|
||||
B18(BitCircuit<3, 2>),
|
||||
B19(BitCircuit<3, 2>),
|
||||
B20(BitCircuit<3, 2>),
|
||||
B21(BitCircuit<3, 2>),
|
||||
B22(BitCircuit<3, 2>),
|
||||
B23(BitCircuit<3, 2>),
|
||||
B24(BitCircuit<3, 2>),
|
||||
B25(BitCircuit<3, 2>),
|
||||
B26(BitCircuit<3, 2>),
|
||||
B27(BitCircuit<3, 2>),
|
||||
B28(BitCircuit<3, 2>),
|
||||
B29(BitCircuit<3, 2>),
|
||||
B30(BitCircuit<3, 2>),
|
||||
B31(BitCircuit<3, 2>),
|
||||
B0(BitCircuit<4>),
|
||||
B1(BitCircuit<4>),
|
||||
B2(BitCircuit<4>),
|
||||
B3(BitCircuit<4>),
|
||||
B4(BitCircuit<4>),
|
||||
B5(BitCircuit<4>),
|
||||
B6(BitCircuit<4>),
|
||||
B7(BitCircuit<4>),
|
||||
B8(BitCircuit<4>),
|
||||
B9(BitCircuit<4>),
|
||||
B10(BitCircuit<4>),
|
||||
B11(BitCircuit<4>),
|
||||
B12(BitCircuit<4>),
|
||||
B13(BitCircuit<4>),
|
||||
B14(BitCircuit<4>),
|
||||
B15(BitCircuit<4>),
|
||||
B16(BitCircuit<4>),
|
||||
B17(BitCircuit<4>),
|
||||
B18(BitCircuit<4>),
|
||||
B19(BitCircuit<4>),
|
||||
B20(BitCircuit<4>),
|
||||
B21(BitCircuit<4>),
|
||||
B22(BitCircuit<4>),
|
||||
B23(BitCircuit<4>),
|
||||
B24(BitCircuit<4>),
|
||||
B25(BitCircuit<4>),
|
||||
B26(BitCircuit<4>),
|
||||
B27(BitCircuit<4>),
|
||||
B28(BitCircuit<4>),
|
||||
B29(BitCircuit<4>),
|
||||
B30(BitCircuit<4>),
|
||||
B31(BitCircuit<4>),
|
||||
}
|
||||
impl BitCircuitInfo for AnyBitCircuit {
|
||||
fn info(&self) -> (&[Node], &[usize], usize) {
|
||||
fn info(&self) -> (&[Node], usize) {
|
||||
match self {
|
||||
AnyBitCircuit::B0(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B1(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B2(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B3(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B4(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B5(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B6(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B7(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B8(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B9(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B10(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B11(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B12(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B13(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B14(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B15(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B16(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B17(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B18(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B19(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B20(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B21(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B22(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B23(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B24(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B25(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B26(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B27(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B28(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B29(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B30(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B31(bit_circuit) => (
|
||||
bit_circuit.nodes.as_ref(),
|
||||
bit_circuit.levels.as_ref(),
|
||||
bit_circuit.max_inter_state,
|
||||
),
|
||||
AnyBitCircuit::B0(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B1(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B2(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B3(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B4(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B5(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B6(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B7(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B8(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B9(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B10(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B11(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B12(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B13(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B14(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B15(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B16(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B17(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B18(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B19(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B20(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B21(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B22(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B23(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B24(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B25(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B26(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B27(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B28(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B29(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B30(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
AnyBitCircuit::B31(bit_circuit) => (bit_circuit.nodes.as_ref(), bit_circuit.max_inter_state),
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -207,258 +79,298 @@ impl GetBitCircuitInfo<u32> for Circuit<AnyBitCircuit, 32usize> {
|
||||
fn output_size(&self) -> usize {
|
||||
u32::BITS as usize
|
||||
}
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], &[usize], usize) {
|
||||
fn get_circuit(&self, bit: usize) -> (&[Node], usize) {
|
||||
self.0[bit].info()
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) static OUTPUT_CIRCUITS: Circuit<AnyBitCircuit, 32usize> = Circuit([
|
||||
AnyBitCircuit::B0(BitCircuit::new(
|
||||
[Node::new(32, 0, 1), Node::new(32, 1, 0), Node::new(0, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(32, 0, 1),
|
||||
Node::Cmux(32, 1, 0),
|
||||
Node::Cmux(0, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B1(BitCircuit::new(
|
||||
[Node::new(33, 0, 1), Node::new(33, 1, 0), Node::new(1, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(33, 0, 1),
|
||||
Node::Cmux(33, 1, 0),
|
||||
Node::Cmux(1, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B2(BitCircuit::new(
|
||||
[Node::new(34, 0, 1), Node::new(34, 1, 0), Node::new(2, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(34, 1, 0),
|
||||
Node::Cmux(34, 0, 1),
|
||||
Node::Cmux(2, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B3(BitCircuit::new(
|
||||
[Node::new(35, 1, 0), Node::new(35, 0, 1), Node::new(3, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(35, 0, 1),
|
||||
Node::Cmux(35, 1, 0),
|
||||
Node::Cmux(3, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B4(BitCircuit::new(
|
||||
[Node::new(36, 1, 0), Node::new(36, 0, 1), Node::new(4, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(36, 0, 1),
|
||||
Node::Cmux(36, 1, 0),
|
||||
Node::Cmux(4, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B5(BitCircuit::new(
|
||||
[Node::new(37, 0, 1), Node::new(37, 1, 0), Node::new(5, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(37, 0, 1),
|
||||
Node::Cmux(37, 1, 0),
|
||||
Node::Cmux(5, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B6(BitCircuit::new(
|
||||
[Node::new(38, 0, 1), Node::new(38, 1, 0), Node::new(6, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(38, 1, 0),
|
||||
Node::Cmux(38, 0, 1),
|
||||
Node::Cmux(6, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B7(BitCircuit::new(
|
||||
[Node::new(39, 0, 1), Node::new(39, 1, 0), Node::new(7, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(39, 1, 0),
|
||||
Node::Cmux(39, 0, 1),
|
||||
Node::Cmux(7, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B8(BitCircuit::new(
|
||||
[Node::new(40, 0, 1), Node::new(40, 1, 0), Node::new(8, 0, 1)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(40, 0, 1),
|
||||
Node::Cmux(40, 1, 0),
|
||||
Node::Cmux(8, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B9(BitCircuit::new(
|
||||
[Node::new(41, 1, 0), Node::new(41, 0, 1), Node::new(9, 1, 0)],
|
||||
[0, 2],
|
||||
[
|
||||
Node::Cmux(41, 1, 0),
|
||||
Node::Cmux(41, 0, 1),
|
||||
Node::Cmux(9, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B10(BitCircuit::new(
|
||||
[
|
||||
Node::new(42, 0, 1),
|
||||
Node::new(42, 1, 0),
|
||||
Node::new(10, 0, 1),
|
||||
Node::Cmux(42, 0, 1),
|
||||
Node::Cmux(42, 1, 0),
|
||||
Node::Cmux(10, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B11(BitCircuit::new(
|
||||
[
|
||||
Node::new(43, 1, 0),
|
||||
Node::new(43, 0, 1),
|
||||
Node::new(11, 1, 0),
|
||||
Node::Cmux(43, 0, 1),
|
||||
Node::Cmux(43, 1, 0),
|
||||
Node::Cmux(11, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B12(BitCircuit::new(
|
||||
[
|
||||
Node::new(44, 0, 1),
|
||||
Node::new(44, 1, 0),
|
||||
Node::new(12, 0, 1),
|
||||
Node::Cmux(44, 0, 1),
|
||||
Node::Cmux(44, 1, 0),
|
||||
Node::Cmux(12, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B13(BitCircuit::new(
|
||||
[
|
||||
Node::new(45, 1, 0),
|
||||
Node::new(45, 0, 1),
|
||||
Node::new(13, 1, 0),
|
||||
Node::Cmux(45, 1, 0),
|
||||
Node::Cmux(45, 0, 1),
|
||||
Node::Cmux(13, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B14(BitCircuit::new(
|
||||
[
|
||||
Node::new(46, 0, 1),
|
||||
Node::new(46, 1, 0),
|
||||
Node::new(14, 0, 1),
|
||||
Node::Cmux(46, 1, 0),
|
||||
Node::Cmux(46, 0, 1),
|
||||
Node::Cmux(14, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B15(BitCircuit::new(
|
||||
[
|
||||
Node::new(47, 1, 0),
|
||||
Node::new(47, 0, 1),
|
||||
Node::new(15, 1, 0),
|
||||
Node::Cmux(47, 1, 0),
|
||||
Node::Cmux(47, 0, 1),
|
||||
Node::Cmux(15, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B16(BitCircuit::new(
|
||||
[
|
||||
Node::new(48, 0, 1),
|
||||
Node::new(48, 1, 0),
|
||||
Node::new(16, 0, 1),
|
||||
Node::Cmux(48, 0, 1),
|
||||
Node::Cmux(48, 1, 0),
|
||||
Node::Cmux(16, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B17(BitCircuit::new(
|
||||
[
|
||||
Node::new(49, 1, 0),
|
||||
Node::new(49, 0, 1),
|
||||
Node::new(17, 1, 0),
|
||||
Node::Cmux(49, 0, 1),
|
||||
Node::Cmux(49, 1, 0),
|
||||
Node::Cmux(17, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B18(BitCircuit::new(
|
||||
[
|
||||
Node::new(50, 1, 0),
|
||||
Node::new(50, 0, 1),
|
||||
Node::new(18, 1, 0),
|
||||
Node::Cmux(50, 0, 1),
|
||||
Node::Cmux(50, 1, 0),
|
||||
Node::Cmux(18, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B19(BitCircuit::new(
|
||||
[
|
||||
Node::new(51, 0, 1),
|
||||
Node::new(51, 1, 0),
|
||||
Node::new(19, 0, 1),
|
||||
Node::Cmux(51, 1, 0),
|
||||
Node::Cmux(51, 0, 1),
|
||||
Node::Cmux(19, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B20(BitCircuit::new(
|
||||
[
|
||||
Node::new(52, 1, 0),
|
||||
Node::new(52, 0, 1),
|
||||
Node::new(20, 1, 0),
|
||||
Node::Cmux(52, 1, 0),
|
||||
Node::Cmux(52, 0, 1),
|
||||
Node::Cmux(20, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B21(BitCircuit::new(
|
||||
[
|
||||
Node::new(53, 1, 0),
|
||||
Node::new(53, 0, 1),
|
||||
Node::new(21, 1, 0),
|
||||
Node::Cmux(53, 0, 1),
|
||||
Node::Cmux(53, 1, 0),
|
||||
Node::Cmux(21, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B22(BitCircuit::new(
|
||||
[
|
||||
Node::new(54, 1, 0),
|
||||
Node::new(54, 0, 1),
|
||||
Node::new(22, 1, 0),
|
||||
Node::Cmux(54, 1, 0),
|
||||
Node::Cmux(54, 0, 1),
|
||||
Node::Cmux(22, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B23(BitCircuit::new(
|
||||
[
|
||||
Node::new(55, 1, 0),
|
||||
Node::new(55, 0, 1),
|
||||
Node::new(23, 1, 0),
|
||||
Node::Cmux(55, 1, 0),
|
||||
Node::Cmux(55, 0, 1),
|
||||
Node::Cmux(23, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B24(BitCircuit::new(
|
||||
[
|
||||
Node::new(56, 1, 0),
|
||||
Node::new(56, 0, 1),
|
||||
Node::new(24, 1, 0),
|
||||
Node::Cmux(56, 0, 1),
|
||||
Node::Cmux(56, 1, 0),
|
||||
Node::Cmux(24, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B25(BitCircuit::new(
|
||||
[
|
||||
Node::new(57, 1, 0),
|
||||
Node::new(57, 0, 1),
|
||||
Node::new(25, 1, 0),
|
||||
Node::Cmux(57, 0, 1),
|
||||
Node::Cmux(57, 1, 0),
|
||||
Node::Cmux(25, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B26(BitCircuit::new(
|
||||
[
|
||||
Node::new(58, 1, 0),
|
||||
Node::new(58, 0, 1),
|
||||
Node::new(26, 1, 0),
|
||||
Node::Cmux(58, 1, 0),
|
||||
Node::Cmux(58, 0, 1),
|
||||
Node::Cmux(26, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B27(BitCircuit::new(
|
||||
[
|
||||
Node::new(59, 1, 0),
|
||||
Node::new(59, 0, 1),
|
||||
Node::new(27, 1, 0),
|
||||
Node::Cmux(59, 0, 1),
|
||||
Node::Cmux(59, 1, 0),
|
||||
Node::Cmux(27, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B28(BitCircuit::new(
|
||||
[
|
||||
Node::new(60, 1, 0),
|
||||
Node::new(60, 0, 1),
|
||||
Node::new(28, 1, 0),
|
||||
Node::Cmux(60, 0, 1),
|
||||
Node::Cmux(60, 1, 0),
|
||||
Node::Cmux(28, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B29(BitCircuit::new(
|
||||
[
|
||||
Node::new(61, 0, 1),
|
||||
Node::new(61, 1, 0),
|
||||
Node::new(29, 0, 1),
|
||||
Node::Cmux(61, 0, 1),
|
||||
Node::Cmux(61, 1, 0),
|
||||
Node::Cmux(29, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B30(BitCircuit::new(
|
||||
[
|
||||
Node::new(62, 1, 0),
|
||||
Node::new(62, 0, 1),
|
||||
Node::new(30, 1, 0),
|
||||
Node::Cmux(62, 0, 1),
|
||||
Node::Cmux(62, 1, 0),
|
||||
Node::Cmux(30, 0, 1),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
AnyBitCircuit::B31(BitCircuit::new(
|
||||
[
|
||||
Node::new(63, 1, 0),
|
||||
Node::new(63, 0, 1),
|
||||
Node::new(31, 1, 0),
|
||||
Node::Cmux(63, 1, 0),
|
||||
Node::Cmux(63, 0, 1),
|
||||
Node::Cmux(31, 1, 0),
|
||||
Node::None,
|
||||
],
|
||||
[0, 2],
|
||||
2,
|
||||
)),
|
||||
]);
|
||||
|
||||
Reference in New Issue
Block a user