Backend refactor (#120)

* remove spqlios, split cpu_ref and cpu_avx into different crates

* remove spqlios submodule

* update crate naming & add avx tests
This commit is contained in:
Jean-Philippe Bossuat
2025-11-19 15:34:31 +01:00
committed by GitHub
parent 84598e42fe
commit 9e007c988f
182 changed files with 1053 additions and 4483 deletions

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@@ -10,7 +10,8 @@ homepage = "https://github.com/phantomzone-org/poulpy"
documentation = "https://docs.rs/poulpy"
[dependencies]
poulpy-backend = {workspace = true}
poulpy-cpu-avx = {workspace = true}
poulpy-cpu-ref = {workspace = true}
poulpy-hal = {workspace = true}
poulpy-core = {workspace = true}
criterion = {workspace = true}

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@@ -1,7 +1,6 @@
use std::hint::black_box;
use criterion::{BenchmarkId, Criterion, criterion_group, criterion_main};
use poulpy_backend::{FFT64Avx, FFT64Ref, FFT64Spqlios};
use poulpy_core::{
GGSWNoise, GLWEDecrypt, GLWEEncryptSk, GLWEExternalProduct, LWEEncryptSk, ScratchTakeCore,
layouts::{
@@ -9,12 +8,14 @@ use poulpy_core::{
GLWESecretPreparedFactory, LWE, LWELayout, LWESecret,
},
};
use poulpy_cpu_avx::FFT64Avx;
use poulpy_cpu_ref::FFT64Ref;
use poulpy_hal::{
api::{ModuleN, ModuleNew, ScratchOwnedAlloc, ScratchOwnedBorrow, VecZnxRotateInplace},
layouts::{Backend, Module, Scratch, ScratchOwned},
source::Source,
};
use poulpy_schemes::tfhe::{
use poulpy_schemes::bin_fhe::{
blind_rotation::{
BlindRotationAlgo, BlindRotationKey, BlindRotationKeyFactory, BlindRotationKeyInfos, BlindRotationKeyLayout, CGGI,
},
@@ -187,15 +188,10 @@ fn bench_circuit_bootstrapping_cpu_avx_fft64(c: &mut Criterion) {
benc_circuit_bootstrapping::<FFT64Avx, CGGI>(c, "fft64_avx");
}
fn bench_circuit_bootstrapping_cpu_spqlios_fft64(c: &mut Criterion) {
benc_circuit_bootstrapping::<FFT64Spqlios, CGGI>(c, "fft64_spqlios");
}
criterion_group!(
benches,
bench_circuit_bootstrapping_cpu_ref_fft64,
bench_circuit_bootstrapping_cpu_avx_fft64,
bench_circuit_bootstrapping_cpu_spqlios_fft64,
);
criterion_main!(benches);

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@@ -9,10 +9,10 @@ use poulpy_core::{
use std::time::Instant;
#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
use poulpy_backend::FFT64Avx as BackendImpl;
use poulpy_cpu_avx::FFT64Avx as BackendImpl;
#[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
use poulpy_backend::FFT64Ref as BackendImpl;
use poulpy_cpu_ref::FFT64Ref as BackendImpl;
use poulpy_hal::{
api::{ModuleNew, ScratchOwnedAlloc, ScratchOwnedBorrow, VecZnxNormalizeInplace},
@@ -20,7 +20,7 @@ use poulpy_hal::{
source::Source,
};
use poulpy_schemes::tfhe::{
use poulpy_schemes::bin_fhe::{
blind_rotation::{BlindRotationKeyLayout, CGGI},
circuit_bootstrapping::{CircuitBootstrappingKey, CircuitBootstrappingKeyLayout, CircuitBootstrappingKeyPrepared},
};

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@@ -7,7 +7,7 @@ use poulpy_hal::{
layouts::{Backend, DataMut, DataRef, Module, Scratch},
};
use crate::tfhe::bdd_arithmetic::{ExecuteBDDCircuit, FheUint, FheUintPrepared, GetBitCircuitInfo, UnsignedInteger, circuits};
use crate::bin_fhe::bdd_arithmetic::{ExecuteBDDCircuit, FheUint, FheUintPrepared, GetBitCircuitInfo, UnsignedInteger, circuits};
impl<BE: Backend> ExecuteBDDCircuit1WTo1W<BE> for Module<BE> where Self: Sized + ExecuteBDDCircuit<BE> + GLWEPacking<BE> + GLWECopy
{}

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@@ -9,7 +9,7 @@ use poulpy_hal::{
layouts::{Backend, DataMut, DataRef, Module, Scratch},
};
use crate::tfhe::bdd_arithmetic::{
use crate::bin_fhe::bdd_arithmetic::{
BitSize, ExecuteBDDCircuit, FheUint, FheUintPrepared, GetBitCircuitInfo, GetGGSWBit, UnsignedInteger, circuits,
};

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@@ -5,7 +5,7 @@ use poulpy_core::{
};
use poulpy_hal::layouts::{Backend, Module, Scratch};
use crate::tfhe::bdd_arithmetic::{Cmux, Cswap, GetGGSWBit};
use crate::bin_fhe::bdd_arithmetic::{Cmux, Cswap, GetGGSWBit};
pub struct GLWEBlindRetriever {
accumulators: Vec<Accumulator>,

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@@ -7,7 +7,7 @@ use poulpy_hal::{
layouts::{Backend, Module, ScalarZnx, ScalarZnxToRef, Scratch, ZnxZero},
};
use crate::tfhe::bdd_arithmetic::{Cmux, GetGGSWBit, UnsignedInteger};
use crate::bin_fhe::bdd_arithmetic::{Cmux, GetGGSWBit, UnsignedInteger};
impl<T: UnsignedInteger, BE: Backend> GGSWBlindRotation<T, BE> for Module<BE>
where

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@@ -6,7 +6,7 @@ use poulpy_core::{
};
use poulpy_hal::layouts::{Backend, Module, Scratch, ZnxZero};
use crate::tfhe::bdd_arithmetic::{Cmux, GetGGSWBit, UnsignedInteger};
use crate::bin_fhe::bdd_arithmetic::{Cmux, GetGGSWBit, UnsignedInteger};
impl<T: UnsignedInteger, BE: Backend> GLWEBlinSelection<T, BE> for Module<BE> where Self: GLWECopy + Cmux<BE> + GLWEDecrypt<BE> {}

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@@ -14,7 +14,7 @@ use poulpy_hal::{
};
use std::{collections::HashMap, marker::PhantomData};
use crate::tfhe::bdd_arithmetic::{Cmux, FheUintPrepared, FromBits, GetGGSWBit, ToBits, UnsignedInteger};
use crate::bin_fhe::bdd_arithmetic::{Cmux, FheUintPrepared, FromBits, GetGGSWBit, ToBits, UnsignedInteger};
/// An FHE ciphertext encrypting the bits of an [UnsignedInteger].
pub struct FheUint<D: Data, T: UnsignedInteger> {

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@@ -20,12 +20,12 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::bdd_arithmetic::{
use crate::bin_fhe::bdd_arithmetic::{
BDDKey, BDDKeyHelper, BDDKeyInfos, BDDKeyPrepared, BDDKeyPreparedFactory, BitSize, FheUint, ToBits,
};
use crate::tfhe::bdd_arithmetic::{Cmux, FromBits, ScratchTakeBDD, UnsignedInteger};
use crate::tfhe::blind_rotation::BlindRotationAlgo;
use crate::tfhe::circuit_bootstrapping::{CircuitBootstrappingKeyInfos, CirtuitBootstrappingExecute};
use crate::bin_fhe::bdd_arithmetic::{Cmux, FromBits, ScratchTakeBDD, UnsignedInteger};
use crate::bin_fhe::blind_rotation::BlindRotationAlgo;
use crate::bin_fhe::circuit_bootstrapping::{CircuitBootstrappingKeyInfos, CirtuitBootstrappingExecute};
/// A prepared FHE ciphertext encrypting the bits of an [UnsignedInteger].
pub struct FheUintPrepared<D: Data, T: UnsignedInteger, B: Backend> {

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@@ -1,7 +1,7 @@
use std::marker::PhantomData;
use crate::tfhe::bdd_arithmetic::{BDDKeyPrepared, FheUint, FheUintPrepareDebug, ToBits};
use crate::tfhe::{
use crate::bin_fhe::bdd_arithmetic::{BDDKeyPrepared, FheUint, FheUintPrepareDebug, ToBits};
use crate::bin_fhe::{
bdd_arithmetic::UnsignedInteger, blind_rotation::BlindRotationAlgo, circuit_bootstrapping::CirtuitBootstrappingExecute,
};
use poulpy_core::GGSWNoise;

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<4>),
B1(BitCircuit<8>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<4>),
B1(BitCircuit<4>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<2>),
B1(BitCircuit<2>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<4>),
B1(BitCircuit<4>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<12>),
B1(BitCircuit<18>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<256>),
}

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<256>),
}

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<192>),
B1(BitCircuit<186>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<192>),
B1(BitCircuit<192>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<4>),
B1(BitCircuit<8>),

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@@ -1,4 +1,4 @@
use crate::tfhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
use crate::bin_fhe::bdd_arithmetic::{BitCircuit, BitCircuitFamily, BitCircuitInfo, Circuit, Node};
pub(crate) enum AnyBitCircuit {
B0(BitCircuit<4>),
B1(BitCircuit<4>),

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@@ -16,7 +16,7 @@ use poulpy_hal::{
layouts::{Backend, DataMut, Module, Scratch, VecZnxBig, ZnxInfos, ZnxZero},
};
use crate::tfhe::bdd_arithmetic::GetGGSWBit;
use crate::bin_fhe::bdd_arithmetic::GetGGSWBit;
pub trait BitCircuitInfo: Sync {
fn info(&self) -> (&[Node], usize);

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@@ -1,6 +1,6 @@
use crate::tfhe::bdd_arithmetic::FheUintPreparedDebug;
use crate::tfhe::circuit_bootstrapping::CircuitBootstrappingKeyInfos;
use crate::tfhe::{
use crate::bin_fhe::bdd_arithmetic::FheUintPreparedDebug;
use crate::bin_fhe::circuit_bootstrapping::CircuitBootstrappingKeyInfos;
use crate::bin_fhe::{
bdd_arithmetic::{FheUint, UnsignedInteger},
blind_rotation::{BlindRotationAlgo, BlindRotationKey, BlindRotationKeyFactory},
circuit_bootstrapping::{
@@ -71,15 +71,12 @@ where
where
A: BDDKeyInfos,
{
let ks_glwe: Option<GLWESwitchingKey<Vec<u8>>> = if let Some(ks_infos) = &infos.ks_glwe_infos() {
Some(GLWESwitchingKey::alloc_from_infos(ks_infos))
} else {
None
};
Self {
cbt: CircuitBootstrappingKey::alloc_from_infos(&infos.cbt_infos()),
ks_glwe: ks_glwe,
ks_glwe: infos
.ks_glwe_infos()
.as_ref()
.map(GLWESwitchingKey::alloc_from_infos),
ks_lwe: GLWEToLWEKey::alloc_from_infos(&infos.ks_lwe_infos()),
}
}
@@ -185,19 +182,15 @@ impl<D: DataRef, BRA: BlindRotationAlgo, BE: Backend> BDDKeyInfos for BDDKeyPrep
}
}
fn ks_glwe_infos(&self) -> Option<GLWESwitchingKeyLayout> {
if let Some(ks_glwe) = &self.ks_glwe {
Some(GLWESwitchingKeyLayout {
n: ks_glwe.n(),
base2k: ks_glwe.base2k(),
k: ks_glwe.k(),
rank_in: ks_glwe.rank_in(),
rank_out: ks_glwe.rank_out(),
dnum: ks_glwe.dnum(),
dsize: ks_glwe.dsize(),
})
} else {
None
}
self.ks_glwe.as_ref().map(|ks_glwe| GLWESwitchingKeyLayout {
n: ks_glwe.n(),
base2k: ks_glwe.base2k(),
k: ks_glwe.k(),
rank_in: ks_glwe.rank_in(),
rank_out: ks_glwe.rank_out(),
dnum: ks_glwe.dnum(),
dsize: ks_glwe.dsize(),
})
}
fn ks_lwe_infos(&self) -> GLWEToLWEKeyLayout {
GLWEToLWEKeyLayout {
@@ -301,6 +294,7 @@ impl<D: DataRef, BRA: BlindRotationAlgo, BE: Backend> BDDKeyHelper<D, BRA, BE> f
}
pub trait BDDKeyHelper<D: DataRef, BRA: BlindRotationAlgo, BE: Backend> {
#[allow(clippy::type_complexity)]
fn get_cbt_key(
&self,
) -> (

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@@ -0,0 +1,113 @@
use std::sync::LazyLock;
use poulpy_cpu_avx::FFT64Avx;
use crate::bin_fhe::{bdd_arithmetic::tests::test_suite, blind_rotation::CGGI};
static TEST_CONTEXT_CGGI_FFT64_REF: LazyLock<test_suite::TestContext<CGGI, FFT64Avx>> =
LazyLock::new(|| test_suite::TestContext::<CGGI, FFT64Avx>::new());
#[test]
fn glwe_blind_retriever() {
test_suite::test_glwe_blind_retriever(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn glwe_blind_retrieval_statefull() {
test_suite::test_glwe_blind_retrieval_statefull(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_swap() {
test_suite::test_fhe_uint_swap(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_get_bit_glwe() {
test_suite::test_fhe_uint_get_bit_glwe(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_sext() {
test_suite::test_fhe_uint_sext(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn glwe_blind_selection() {
test_suite::test_glwe_blind_selection(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn fhe_uint_splice_u8() {
test_suite::test_fhe_uint_splice_u8(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn fhe_uint_splice_u16() {
test_suite::test_fhe_uint_splice_u16(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn glwe_to_glwe_blind_rotation() {
test_suite::test_glwe_to_glwe_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn scalar_to_ggsw_blind_rotation() {
test_suite::test_scalar_to_ggsw_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_prepare() {
test_suite::test_bdd_prepare(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_add() {
test_suite::test_bdd_add(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_and() {
test_suite::test_bdd_and(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_or() {
test_suite::test_bdd_or(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sll() {
test_suite::test_bdd_sll(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_slt() {
test_suite::test_bdd_slt(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sltu() {
test_suite::test_bdd_sltu(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sra() {
test_suite::test_bdd_sra(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_srl() {
test_suite::test_bdd_srl(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sub() {
test_suite::test_bdd_sub(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_xor() {
test_suite::test_bdd_xor(&TEST_CONTEXT_CGGI_FFT64_REF)
}

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@@ -0,0 +1,113 @@
use std::sync::LazyLock;
use poulpy_cpu_ref::FFT64Ref;
use crate::tfhe::{bdd_arithmetic::tests::test_suite, blind_rotation::CGGI};
static TEST_CONTEXT_CGGI_FFT64_REF: LazyLock<test_suite::TestContext<CGGI, FFT64Ref>> =
LazyLock::new(|| test_suite::TestContext::<CGGI, FFT64Ref>::new());
#[test]
fn glwe_blind_retriever() {
test_suite::test_glwe_blind_retriever(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn glwe_blind_retrieval_statefull() {
test_suite::test_glwe_blind_retrieval_statefull(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_swap() {
test_suite::test_fhe_uint_swap(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_get_bit_glwe() {
test_suite::test_fhe_uint_get_bit_glwe(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn fhe_uint_sext() {
test_suite::test_fhe_uint_sext(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn glwe_blind_selection() {
test_suite::test_glwe_blind_selection(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn fhe_uint_splice_u8() {
test_suite::test_fhe_uint_splice_u8(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn fhe_uint_splice_u16() {
test_suite::test_fhe_uint_splice_u16(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn glwe_to_glwe_blind_rotation() {
test_suite::test_glwe_to_glwe_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn scalar_to_ggsw_blind_rotation() {
test_suite::test_scalar_to_ggsw_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_prepare() {
test_suite::test_bdd_prepare(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_add() {
test_suite::test_bdd_add(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_and() {
test_suite::test_bdd_and(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_or() {
test_suite::test_bdd_or(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sll() {
test_suite::test_bdd_sll(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_slt() {
test_suite::test_bdd_slt(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sltu() {
test_suite::test_bdd_sltu(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sra() {
test_suite::test_bdd_sra(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_srl() {
test_suite::test_bdd_srl(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_sub() {
test_suite::test_bdd_sub(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn bdd_xor() {
test_suite::test_bdd_xor(&TEST_CONTEXT_CGGI_FFT64_REF)
}

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@@ -0,0 +1,9 @@
pub mod test_suite;
#[cfg(test)]
#[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
mod fft64_ref;
#[cfg(test)]
#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
mod fft64_avx;

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@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
Add, BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
And, BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyPrepared, FheUint, ScratchTakeBDD, ToBits,
tests::test_suite::{TEST_GLWE_INFOS, TestContext},

View File

@@ -12,7 +12,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
FheUintPrepared, GGSWBlindRotation,
tests::test_suite::{TEST_FHEUINT_BASE2K, TEST_RANK, TestContext},

View File

@@ -12,7 +12,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
FheUintPrepared, GLWEBlindRotation,
tests::test_suite::{TEST_FHEUINT_BASE2K, TEST_RANK, TestContext},

View File

@@ -14,7 +14,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
FheUintPrepared, GLWEBlinSelection,
tests::test_suite::{TEST_FHEUINT_BASE2K, TEST_RANK, TestContext},

View File

@@ -46,7 +46,7 @@ use poulpy_core::{
},
};
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{BDDKey, BDDKeyEncryptSk, BDDKeyLayout, BDDKeyPrepared, BDDKeyPreparedFactory},
blind_rotation::{
BlindRotationAlgo, BlindRotationKey, BlindRotationKeyFactory, BlindRotationKeyLayout, BlindRotationKeyPreparedFactory,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Or,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPreparedDebug, FheUintPreparedEncryptSk, FheUintPreparedFactory,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Sll,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Slt,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Sltu,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Sra,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Srl,

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Sub,

View File

@@ -10,7 +10,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
Cswap, FheUint, FheUintPrepared, GLWEBlindRetrieval, GLWEBlindRetriever, ScratchTakeBDD,
tests::test_suite::{TEST_GGSW_INFOS, TEST_GLWE_INFOS, TestContext},

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
};
use rand::RngCore;
use crate::tfhe::{
use crate::bin_fhe::{
bdd_arithmetic::{
BDDKeyEncryptSk, BDDKeyPrepared, BDDKeyPreparedFactory, ExecuteBDDCircuit2WTo1W, FheUint, FheUintPrepare,
FheUintPrepareDebug, FheUintPrepared, FheUintPreparedEncryptSk, FheUintPreparedFactory, Xor,

View File

@@ -13,7 +13,7 @@ use poulpy_core::{
layouts::{GGSWInfos, GLWE, GLWEInfos, GLWEToMut, LWE, LWEInfos, LWEToRef},
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationExecute, BlindRotationKeyInfos, BlindRotationKeyPrepared, CGGI, LookupTable, mod_switch_2n,
};

View File

@@ -10,7 +10,7 @@ use poulpy_core::{
layouts::{GGSW, GGSWInfos, GLWEInfos, GLWESecretPreparedToRef, LWEInfos, LWESecret, LWESecretToRef},
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationKey, BlindRotationKeyEncryptSk, BlindRotationKeyFactory, BlindRotationKeyInfos, CGGI,
};

View File

@@ -9,7 +9,7 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationKeyCompressed, BlindRotationKeyCompressedEncryptSk, BlindRotationKeyCompressedFactory, BlindRotationKeyInfos,
CGGI,
};

View File

@@ -10,7 +10,7 @@ use poulpy_core::{
layouts::{GGSWPreparedFactory, LWEInfos, prepared::GGSWPrepared},
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationKey, BlindRotationKeyInfos, BlindRotationKeyPrepared, BlindRotationKeyPreparedFactory, CGGI,
utils::set_xai_plus_y,
};

View File

@@ -3,7 +3,7 @@ mod key;
mod key_compressed;
mod key_prepared;
use crate::tfhe::blind_rotation::BlindRotationAlgo;
use crate::bin_fhe::blind_rotation::BlindRotationAlgo;
#[derive(Clone)]
pub struct CGGI {}

View File

@@ -9,7 +9,9 @@ use poulpy_core::{
};
use poulpy_hal::layouts::{Backend, DataMut, DataRef, Scratch, ZnxView};
use crate::tfhe::blind_rotation::{BlindRotationKeyInfos, BlindRotationKeyPrepared, LookUpTableRotationDirection, LookupTable};
use crate::bin_fhe::blind_rotation::{
BlindRotationKeyInfos, BlindRotationKeyPrepared, LookUpTableRotationDirection, LookupTable,
};
pub trait BlindRotationAlgo: Sync {}

View File

@@ -8,7 +8,7 @@ use poulpy_core::{
layouts::{GGSWInfos, GLWEInfos, GLWESecretPreparedToRef, LWEInfos, LWESecretToRef},
};
use crate::tfhe::blind_rotation::{BlindRotationAlgo, BlindRotationKey};
use crate::bin_fhe::blind_rotation::{BlindRotationAlgo, BlindRotationKey};
pub trait BlindRotationKeyEncryptSk<BRA: BlindRotationAlgo, B: Backend> {
fn blind_rotation_key_encrypt_sk_tmp_bytes<A>(&self, infos: &A) -> usize

View File

@@ -7,7 +7,7 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyCompressed};
use crate::bin_fhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyCompressed};
pub trait BlindRotationKeyCompressedEncryptSk<B: Backend, BRA: BlindRotationAlgo> {
fn blind_rotation_key_compressed_encrypt_sk_tmp_bytes<A>(&self, infos: &A) -> usize

View File

@@ -12,7 +12,7 @@ use poulpy_core::{
use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
use crate::tfhe::blind_rotation::BlindRotationAlgo;
use crate::bin_fhe::blind_rotation::BlindRotationAlgo;
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
pub struct BlindRotationKeyLayout {

View File

@@ -11,7 +11,7 @@ use poulpy_core::{
layouts::{Base2K, Degree, Dsize, GGSWInfos, GLWEInfos, LWEInfos, TorusPrecision, compressed::GGSWCompressed},
};
use crate::tfhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyInfos};
use crate::bin_fhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyInfos};
#[derive(Clone)]
pub struct BlindRotationKeyCompressed<D: Data, BRT: BlindRotationAlgo> {

View File

@@ -7,7 +7,7 @@ use poulpy_core::{
layouts::{Base2K, Degree, Dnum, Dsize, GGSWInfos, GLWEInfos, LWEInfos, Rank, TorusPrecision, prepared::GGSWPrepared},
};
use crate::tfhe::blind_rotation::{BlindRotationAlgo, BlindRotationKey, BlindRotationKeyInfos};
use crate::bin_fhe::blind_rotation::{BlindRotationAlgo, BlindRotationKey, BlindRotationKeyInfos};
pub trait BlindRotationKeyPreparedFactory<BRA: BlindRotationAlgo, BE: Backend> {
fn blind_rotation_key_prepared_alloc<A>(&self, infos: &A) -> BlindRotationKeyPrepared<Vec<u8>, BRA, BE>

View File

@@ -0,0 +1,40 @@
use poulpy_cpu_avx::FFT64Avx;
use poulpy_hal::{api::ModuleNew, layouts::Module};
use crate::bin_fhe::blind_rotation::{
CGGI,
tests::test_suite::{
generic_blind_rotation::test_blind_rotation,
generic_lut::{test_lut_extended, test_lut_standard},
},
};
#[test]
fn lut_standard() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(32);
test_lut_standard(&module);
}
#[test]
fn lut_extended() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(32);
test_lut_extended(&module);
}
#[test]
fn standard() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(512);
test_blind_rotation::<CGGI, _, FFT64Avx>(&module, 224, 1, 1);
}
#[test]
fn block_binary() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(512);
test_blind_rotation::<CGGI, _, FFT64Avx>(&module, 224, 7, 1);
}
#[test]
fn block_binary_extended() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(512);
test_blind_rotation::<CGGI, _, FFT64Avx>(&module, 224, 7, 2);
}

View File

@@ -1,9 +1,9 @@
use poulpy_backend::cpu_fft64_ref::FFT64Ref;
use poulpy_cpu_ref::FFT64Ref;
use poulpy_hal::{api::ModuleNew, layouts::Module};
use crate::tfhe::blind_rotation::{
CGGI,
tests::{
tests::test_suite::{
generic_blind_rotation::test_blind_rotation,
generic_lut::{test_lut_extended, test_lut_standard},
},

View File

@@ -0,0 +1,10 @@
#[cfg(test)]
#[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
mod fft64_ref;
#[cfg(test)]
#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
mod fft64_avx;
#[cfg(test)]
mod test_suite;

View File

@@ -4,7 +4,7 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationAlgo, BlindRotationExecute, BlindRotationKey, BlindRotationKeyEncryptSk, BlindRotationKeyFactory,
BlindRotationKeyLayout, BlindRotationKeyPrepared, BlindRotationKeyPreparedFactory, LookUpTableLayout, LookupTable,
LookupTableFactory, mod_switch_2n,

View File

@@ -2,7 +2,7 @@ use std::vec;
use poulpy_hal::api::ModuleN;
use crate::tfhe::blind_rotation::{DivRound, LookUpTableLayout, LookupTable, LookupTableFactory};
use crate::bin_fhe::blind_rotation::{DivRound, LookUpTableLayout, LookupTable, LookupTableFactory};
pub fn test_lut_standard<M>(module: &M)
where

View File

@@ -1,6 +1,6 @@
use poulpy_hal::test_suite::serialization::test_reader_writer_interface;
use crate::tfhe::blind_rotation::{BlindRotationKey, BlindRotationKeyCompressed, BlindRotationKeyLayout, CGGI};
use crate::bin_fhe::blind_rotation::{BlindRotationKey, BlindRotationKeyCompressed, BlindRotationKeyLayout, CGGI};
#[test]
fn test_cggi_blind_rotation_key_serialization() {

View File

@@ -0,0 +1,3 @@
pub mod generic_blind_rotation;
pub mod generic_lut;
pub mod generic_serialization;

View File

@@ -15,7 +15,7 @@ use poulpy_core::{
use poulpy_core::layouts::{GGSW, GLWE, LWE};
use crate::tfhe::{
use crate::bin_fhe::{
blind_rotation::{
BlindRotationAlgo, BlindRotationExecute, LookUpTableLayout, LookUpTableRotationDirection, LookupTable, LookupTableFactory,
},

View File

@@ -13,7 +13,7 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::blind_rotation::{
use crate::bin_fhe::blind_rotation::{
BlindRotationAlgo, BlindRotationKey, BlindRotationKeyEncryptSk, BlindRotationKeyFactory, BlindRotationKeyInfos,
BlindRotationKeyLayout,
};

View File

@@ -3,7 +3,7 @@ use std::collections::HashMap;
use poulpy_core::layouts::{GLWEAutomorphismKeyCompressed, GLWETensorKeyCompressed};
use poulpy_hal::layouts::Data;
use crate::tfhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyCompressed};
use crate::bin_fhe::blind_rotation::{BlindRotationAlgo, BlindRotationKeyCompressed};
#[allow(dead_code)]
pub struct CircuitBootstrappingKey<D: Data, BRA: BlindRotationAlgo> {

View File

@@ -10,7 +10,7 @@ use std::collections::HashMap;
use poulpy_hal::layouts::{Backend, Data, DataMut, DataRef, Module, Scratch};
use crate::tfhe::{
use crate::bin_fhe::{
blind_rotation::{
BlindRotationAlgo, BlindRotationKeyInfos, BlindRotationKeyLayout, BlindRotationKeyPrepared,
BlindRotationKeyPreparedFactory,

View File

@@ -6,7 +6,7 @@ use poulpy_hal::{
source::Source,
};
use crate::tfhe::{
use crate::bin_fhe::{
blind_rotation::{BlindRotationAlgo, BlindRotationKey, BlindRotationKeyFactory, BlindRotationKeyLayout},
circuit_bootstrapping::{
CircuitBootstrappingKey, CircuitBootstrappingKeyEncryptSk, CircuitBootstrappingKeyLayout,

View File

@@ -0,0 +1,21 @@
use poulpy_cpu_avx::FFT64Avx;
use poulpy_hal::{api::ModuleNew, layouts::Module};
use crate::bin_fhe::{
blind_rotation::CGGI,
circuit_bootstrapping::tests::circuit_bootstrapping::{
test_circuit_bootstrapping_to_constant, test_circuit_bootstrapping_to_exponent,
},
};
#[test]
fn to_constant_cggi() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(256);
test_circuit_bootstrapping_to_constant::<FFT64Avx, _, CGGI>(&module);
}
#[test]
fn to_exponent_cggi() {
let module: Module<FFT64Avx> = Module::<FFT64Avx>::new(256);
test_circuit_bootstrapping_to_exponent::<FFT64Avx, _, CGGI>(&module);
}

View File

@@ -1,7 +1,7 @@
use poulpy_backend::cpu_fft64_ref::FFT64Ref;
use poulpy_cpu_ref::FFT64Ref;
use poulpy_hal::{api::ModuleNew, layouts::Module};
use crate::tfhe::{
use crate::bin_fhe::{
blind_rotation::CGGI,
circuit_bootstrapping::tests::circuit_bootstrapping::{
test_circuit_bootstrapping_to_constant, test_circuit_bootstrapping_to_exponent,
@@ -9,13 +9,13 @@ use crate::tfhe::{
};
#[test]
fn test_to_constant_cggi() {
fn to_constant_cggi() {
let module: Module<FFT64Ref> = Module::<FFT64Ref>::new(256);
test_circuit_bootstrapping_to_constant::<FFT64Ref, _, CGGI>(&module);
}
#[test]
fn test_to_exponent_cggi() {
fn to_exponent_cggi() {
let module: Module<FFT64Ref> = Module::<FFT64Ref>::new(256);
test_circuit_bootstrapping_to_exponent::<FFT64Ref, _, CGGI>(&module);
}

View File

@@ -0,0 +1,9 @@
pub mod circuit_bootstrapping;
#[cfg(test)]
#[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
mod fft64_ref;
#[cfg(test)]
#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
mod fft64_avx;

View File

@@ -1 +1 @@
pub mod tfhe;
pub mod bin_fhe;

View File

@@ -1,122 +0,0 @@
use std::sync::LazyLock;
use poulpy_backend::FFT64Ref;
use crate::tfhe::{
bdd_arithmetic::tests::test_suite::{
TestContext, test_bdd_add, test_bdd_and, test_bdd_or, test_bdd_prepare, test_bdd_sll, test_bdd_slt, test_bdd_sltu,
test_bdd_sra, test_bdd_srl, test_bdd_sub, test_bdd_xor, test_fhe_uint_get_bit_glwe, test_fhe_uint_sext,
test_fhe_uint_splice_u8, test_fhe_uint_splice_u16, test_fhe_uint_swap, test_glwe_blind_retrieval_statefull,
test_glwe_blind_retriever, test_glwe_blind_selection, test_glwe_to_glwe_blind_rotation,
test_scalar_to_ggsw_blind_rotation,
},
blind_rotation::CGGI,
};
static TEST_CONTEXT_CGGI_FFT64_REF: LazyLock<TestContext<CGGI, FFT64Ref>> =
LazyLock::new(|| TestContext::<CGGI, FFT64Ref>::new());
#[test]
fn test_glwe_blind_retriever_fft64_ref() {
test_glwe_blind_retriever(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn test_glwe_blind_retrieval_statefull_fft64_ref() {
test_glwe_blind_retrieval_statefull(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn test_fhe_uint_swap_fft64_ref() {
test_fhe_uint_swap(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn test_fhe_uint_get_bit_glwe_fft64_ref() {
test_fhe_uint_get_bit_glwe(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn test_fhe_uint_sext_fft64_ref() {
test_fhe_uint_sext(&TEST_CONTEXT_CGGI_FFT64_REF);
}
#[test]
fn test_glwe_blind_selection_fft64_ref() {
test_glwe_blind_selection(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_fhe_uint_splice_u8_fft64_ref() {
test_fhe_uint_splice_u8(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_fhe_uint_splice_u16_fft64_ref() {
test_fhe_uint_splice_u16(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_glwe_to_glwe_blind_rotation_fft64_ref() {
test_glwe_to_glwe_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_scalar_to_ggsw_blind_rotation_fft64_ref() {
test_scalar_to_ggsw_blind_rotation(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_prepare_fft64_ref() {
test_bdd_prepare(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_add_fft64_ref() {
test_bdd_add(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_and_fft64_ref() {
test_bdd_and(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_or_fft64_ref() {
test_bdd_or(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_sll_fft64_ref() {
test_bdd_sll(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_slt_fft64_ref() {
test_bdd_slt(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_sltu_fft64_ref() {
test_bdd_sltu(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_sra_fft64_ref() {
test_bdd_sra(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_srl_fft64_ref() {
test_bdd_srl(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_sub_fft64_ref() {
test_bdd_sub(&TEST_CONTEXT_CGGI_FFT64_REF)
}
#[test]
fn test_bdd_xor_fft64_ref() {
test_bdd_xor(&TEST_CONTEXT_CGGI_FFT64_REF)
}

View File

@@ -1,4 +0,0 @@
pub mod test_suite;
#[cfg(test)]
mod fft64_ref;

View File

@@ -1,7 +0,0 @@
#[cfg(test)]
mod generic_serialization;
#[cfg(test)]
mod implementation;
pub mod generic_blind_rotation;
pub mod generic_lut;

View File

@@ -1,3 +0,0 @@
pub mod circuit_bootstrapping;
mod fft64;