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Add schemes (#71)

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* Move br + cbt to schemes/tfhe

* refactor blind rotation

* refactor circuit bootstrapping

* renamed exec -> prepared
This commit is contained in:
Jean-Philippe Bossuat
2025-08-15 15:06:26 +02:00
committed by GitHub
parent 8d9897b88b
commit c7219c35e9
130 changed files with 2631 additions and 3270 deletions
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17
backend/src/implementation/cpu_spqlios/test/vec_znx_fft64.rs
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@@ -2,10 +2,7 @@ use crate::{
hal::{
api::ModuleNew,
layouts::Module,
tests::vec_znx::{
test_vec_znx_add_normal, test_vec_znx_encode_vec_i64_hi_norm, test_vec_znx_encode_vec_i64_lo_norm,
test_vec_znx_fill_uniform,
},
tests::vec_znx::{test_vec_znx_add_normal, test_vec_znx_fill_uniform},
},
implementation::cpu_spqlios::FFT64,
};
@@ -21,15 +18,3 @@ fn test_vec_znx_add_normal_fft64() {
let module: Module<FFT64> = Module::<FFT64>::new(1 << 12);
test_vec_znx_add_normal(&module);
}
#[test]
fn test_vec_znx_encode_vec_lo_norm_fft64() {
let module: Module<FFT64> = Module::<FFT64>::new(1 << 8);
test_vec_znx_encode_vec_i64_lo_norm(&module);
}
#[test]
fn test_vec_znx_encode_vec_hi_norm_fft64() {
let module: Module<FFT64> = Module::<FFT64>::new(1 << 8);
test_vec_znx_encode_vec_i64_hi_norm(&module);
}