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Add parameter 'inputs_already_allocated' to CircomCircuit

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To allow allocating the inputs in previous stages.
This commit is contained in:
arnaucube
2024-03-25 22:31:47 +01:00
parent 5f8cfd49be
commit 48f2915b64
2 changed files with 20 additions and 11 deletions
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1
src/circom/builder.rs
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@@ -58,6 +58,7 @@ impl<F: PrimeField> CircomBuilder<F> {
let mut circom = CircomCircuit {
r1cs: self.cfg.r1cs.clone(),
witness: None,
inputs_already_allocated: false,
};
// Disable the wire mapping

30
src/circom/circuit.rs
View File

@@ -11,6 +11,7 @@ use color_eyre::Result;
pub struct CircomCircuit<F: PrimeField> {
pub r1cs: R1CS<F>,
pub witness: Option<Vec<F>>,
pub inputs_already_allocated: bool,
}
impl<F: PrimeField> CircomCircuit<F> {
@@ -31,16 +32,18 @@ impl<F: PrimeField> ConstraintSynthesizer<F> for CircomCircuit<F> {
let wire_mapping = &self.r1cs.wire_mapping;
// Start from 1 because Arkworks implicitly allocates One for the first input
for i in 1..self.r1cs.num_inputs {
cs.new_input_variable(|| {
Ok(match witness {
None => F::from(1u32),
Some(w) => match wire_mapping {
Some(m) => w[m[i]],
None => w[i],
},
})
})?;
if !self.inputs_already_allocated {
for i in 1..self.r1cs.num_inputs {
cs.new_input_variable(|| {
Ok(match witness {
None => F::from(1u32),
Some(w) => match wire_mapping {
Some(m) => w[m[i]],
None => w[i],
},
})
})?;
}
}
for i in 0..self.r1cs.num_aux {
@@ -69,7 +72,12 @@ impl<F: PrimeField> ConstraintSynthesizer<F> for CircomCircuit<F> {
)
};
for constraint in &self.r1cs.constraints {
let skip = if self.inputs_already_allocated {
self.r1cs.num_inputs
} else {
0
};
for constraint in self.r1cs.constraints.iter().skip(skip) {
cs.enforce_constraint(
make_lc(&constraint.0),
make_lc(&constraint.1),