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@ -11,6 +11,7 @@ use color_eyre::Result; |
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pub struct CircomCircuit<F: PrimeField> {
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pub struct CircomCircuit<F: PrimeField> {
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pub r1cs: R1CS<F>,
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pub r1cs: R1CS<F>,
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pub witness: Option<Vec<F>>,
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pub witness: Option<Vec<F>>,
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pub inputs_already_allocated: bool,
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}
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}
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impl<F: PrimeField> CircomCircuit<F> {
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impl<F: PrimeField> CircomCircuit<F> {
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@ -31,16 +32,18 @@ impl ConstraintSynthesizer for CircomCircuit { |
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let wire_mapping = &self.r1cs.wire_mapping;
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let wire_mapping = &self.r1cs.wire_mapping;
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// Start from 1 because Arkworks implicitly allocates One for the first input
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// Start from 1 because Arkworks implicitly allocates One for the first input
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for i in 1..self.r1cs.num_inputs {
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cs.new_input_variable(|| {
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Ok(match witness {
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None => F::from(1u32),
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Some(w) => match wire_mapping {
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Some(m) => w[m[i]],
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None => w[i],
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},
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})
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})?;
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if !self.inputs_already_allocated {
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for i in 1..self.r1cs.num_inputs {
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cs.new_input_variable(|| {
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Ok(match witness {
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None => F::from(1u32),
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Some(w) => match wire_mapping {
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Some(m) => w[m[i]],
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None => w[i],
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},
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})
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})?;
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}
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}
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}
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for i in 0..self.r1cs.num_aux {
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for i in 0..self.r1cs.num_aux {
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@ -69,7 +72,12 @@ impl ConstraintSynthesizer for CircomCircuit { |
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)
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)
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};
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};
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for constraint in &self.r1cs.constraints {
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let skip = if self.inputs_already_allocated {
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self.r1cs.num_inputs
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} else {
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0
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};
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for constraint in self.r1cs.constraints.iter().skip(skip) {
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cs.enforce_constraint(
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cs.enforce_constraint(
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make_lc(&constraint.0),
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make_lc(&constraint.0),
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make_lc(&constraint.1),
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make_lc(&constraint.1),
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