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Author	SHA1	Message	Date
Jordi Baylina	45e359aa35	0.5.2 v0.5.2	2020-03-26 19:05:36 +01:00
Jordi Baylina	da6cff2335	Resolve right path for circom_runtime in tester	2020-03-26 19:05:23 +01:00
Jordi Baylina	38b4a7a8b3	0.5.1 v0.5.1	2020-03-26 18:41:05 +01:00
Jordi Baylina	825f31b420	deps and sanitycheck in tester	2020-03-26 18:40:52 +01:00
Jordi Baylina	b9b384681b	0.5.0 v0.5.0	2020-03-26 17:47:18 +01:00
Jordi Baylina	eb8cb0af74	Almost ready for 0.5.0	2020-03-26 17:42:25 +01:00
Jordi Baylina	ef899e618b	Wasm generation finished	2020-03-16 20:37:08 +01:00
Jordi Baylina	8f63d18ff4	Begining of wasm	2020-03-09 21:16:56 +01:00
Jordi Baylina	6c1a3e7687	Isolate code generation to output different languages	2020-02-04 19:21:37 +01:00
Jordi Baylina	111c91c70d	bigarray	2020-01-30 07:25:48 +01:00
Jordi Baylina	a8d597d8c5	Optimize number of getSignalOffset and getSignalSizes	2020-01-28 15:17:47 +01:00
Jordi Baylina	3a9766a008	write code in stream mode	2020-01-27 13:08:11 +07:00
Jordi Baylina	20058a38d6	toInt and isTrue in assembly	2020-01-23 09:31:29 +07:00
Jordi Baylina	f6092e3944	Integrated with asm and tested	2020-01-23 07:20:58 +07:00
Jordi Baylina	e11e6768e4	buildasm field finished	2020-01-17 17:58:25 +01:00
Jordi Baylina	63fd72cdc7	Assembly library started	2020-01-14 22:43:58 +01:00
Jordi Baylina	da969a5e16	Construction phase redone	2019-12-23 19:34:52 +01:00
Jordi Baylina	b564201170	Multithread	2019-12-20 22:01:12 +01:00
Jordi Baylina	e62c1cdbc3	Fixes and tests passed	2019-12-16 21:37:14 +01:00
Jordi Baylina	ec0e7f421b	roll unrolled loops with code	2019-12-10 18:46:10 +01:00
Jordi Baylina	afa8201c2c	All operators finished	2019-12-08 16:20:15 +01:00
Jordi Baylina	1f94f7f3ec	All Bit and logical operators working	2019-12-08 13:39:16 +01:00
Jordi Baylina	eaf4396cb3	div operators	2019-12-07 21:47:00 +01:00
Jordi Baylina	2a45647274	If added	2019-12-07 14:15:27 +01:00
Jordi Baylina	305bc7456f	Syms generarion fixed	2019-12-07 13:14:55 +01:00
Jordi Baylina	ff1c12bcc3	scopes work og in code generation	2019-12-07 12:58:11 +01:00
Jordi Baylina	fbcc753bc1	Arrays working	2019-12-06 13:26:26 +01:00
Jordi Baylina	1e3d1235cb	Merge branch 'master' into c_build	2019-12-04 22:13:55 +01:00
Jordi Baylina	7b0b203c60	Merge branch 'master' of github.com:iden3/circom	2019-12-04 21:54:34 +01:00
Jordi Baylina	80846667ea	0.0.35 v0.0.35	2019-12-04 21:54:11 +01:00
Jordi Baylina	7181c372d9	Error with bad assignments	2019-12-04 21:53:39 +01:00
Jordi Baylina	aecc28a79b	Fix array assignement and not allow assign with equal	2019-12-04 17:52:52 +01:00
Jordi Baylina	0be08d67b0	Fix array assignement and not allow assign with equal	2019-12-04 17:40:48 +01:00
Jordi Baylina	6cdb006909	constants	2019-11-30 22:59:14 +01:00
Jordi Baylina	f4bbcfd90c	functions added	2019-11-29 20:19:58 +01:00
Jordi Baylina	93330f065b	for loops	2019-11-28 15:18:52 +01:00
Jordi Baylina	66291a0efe	C generation	2019-11-23 19:12:58 +01:00
Jordi Baylina	83c95b5188	Merge pull request #42 from daira/patch-1 ... Yes! Thank you for the fix!	2019-10-15 19:11:02 +09:00
Daira Hopwood	13c4c81a0f	Fix error in comment	2019-10-13 09:35:26 -07:00
Jordi Baylina	51ff27b9c6	Verbose added	2019-09-22 12:56:05 +02:00
Jordi Baylina	6985892f86	0.0.34 v0.0.34	2019-09-18 17:43:39 +02:00
Jordi Baylina	bacb7afde7	Merge branch 'master' of github.com:iden3/circom	2019-09-18 17:43:26 +02:00
Jordi Baylina	d04eff6c0d	Optimize optimization and fix out<==in	2019-09-18 17:43:14 +02:00
Jordi Baylina	230894921e	Merge pull request #41 from k06a/fix/error-message ... Fix error message, for most IDEs recognises as URI to file row and column	2019-09-16 22:10:12 +02:00
Anton Bukov	64029e1842	Fix error message, for most IDEs recognises as URI to file row and column	2019-09-15 22:57:18 +03:00
Jordi Baylina	700412f23d	0.0.33 v0.0.33	2019-09-15 18:55:40 +02:00
Jordi Baylina	832077fbe9	Fix Optimization	2019-09-15 18:55:28 +02:00
Jordi Baylina	0df0ac712d	0.0.32 v0.0.32	2019-09-15 10:48:02 +02:00
Jordi Baylina	67a35ee400	better info in runtime constraint assertion	2019-09-15 10:47:52 +02:00
Jordi Baylina	680e3fe139	0.0.31 v0.0.31	2019-08-29 16:26:28 +02:00